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I am using a PWM in up-downcount mode which I want to update with different CMPA-values at both TBCTR = 0 and TBCTR = PRD. So the CMPA-value changes twice per PWM-period. LOADAMODE register is set to "10" which corresponds to "load on either CTR = Zero or CTR = PRD". SHDWAMODE ist set to 0 -> shadow mode, and LOADASYNC is set to 0, that means that shadow to active load of CMPA occurs according to LOADAMODE.
However, although I can see, that the CMPA register toggles between a high value and a low value (since I write at two different occasions per period two distinct values into the CMPA-register), the PWM indicates clearly that only one CMPA-value is taken for the comparison with the time base counter. The behaviour of the PWM is as if a shadow to active register load is done only once and not twice per period. WIth period I mean a full upcount and downcount cycle. LOADAMODE = 0 and LOADAMODE = 1 and LOADAMODE = 2 produce the same PWM.
I tried an immediate update, and there the system behaves as expected. With immediate update I get the PWM I would expect to get with shadow update at TBCTR = 0 or TBCTR = PRD.
The system I am using is entirely deterministic, thus the update of the CMPA value is done exactly at the same time with respect to the time base counter, in fact the update is triggered when the time base counter is zero and when the time base counter equals PRD.
Any ideas what goes wrong here?
Hi Sieghard,
Can you elaborate a little bit here: "Well the debugger sometimes does not display the correct values...". Do you see differences between the expressions window and the memory browser?
A couple things to note about the CMPA register. Both reads and writes (presumably including from the debugger) will go to the shadow register:
So all you can see is the shadow value, not the active value.
Furthermore, since the shadow--> active load only occurs at TBPRD or ZERO events, there should be some time where CMPA only shows you the next (shadow) value not the current (active) value. This is when SHDWAFULL bit is set. SHDWAFULL bit transitioning from 1-->0 should correspond to the shadow-->active load. When SHDWAFULL = 0, shadow CMPA = active CMPA, so you can effectively see the active value.
Hi Devin,
basically I often do not see correct values in the "Registers" window of the debugger. Even a refresh, or a continuous refresh of the registers window does not display the correct values. In this case all values of all registers are displayed as zero. It doesn't apply to any particular register, I can see this behaviour both on CPU1 and CPU2 registers. As a workaround I use the option "view memory at address", where in return I can always see the values I expect. So for me this is a display, or an update problem of the debugger which doesn't have anything to do with the problem here. I just rely more on what I see with the "view memory at address" option, than with what I see in the registers window.
I have included a screenshot:
CH1 = ePWM
CH3 = indicates when CLATASK is triggered
CH4 = indicates when the CLATASK writes the CMPA-(shadow) register
Please see also the following sketch I have made: Since I alternately update the CMPA-register with a "small" and a "high" value, I expect to get the following ePWM-signal (in green)
Did I get things right here? Is the shadow to active register update really done where I assume it's done? Another remark: I am using high resolution ePWM, thus I write both the CMPA and the CMPAHR register. According to the data sheet this is done in a single cycle.
Hi Devin,
thanks for this information. The "Expressions" window displays the correct information. I will use the "Expressions" window for future debugging sessions.
Here is a screenshot of the "Expressions" window:
For debugging purposes I will check the SHDWAFULL bit before I write the CMPA-register. Actually it should always be clear since a shadow to active load must have taken place previousely. I will let you know, as soon as I have some results.
I have just checked the state of the SHDWAFULL register: As expected, the SHDWAFULL bit is never set, when I write the CMPA:CMPAHR register. So I don't overwrite any CMPA-value.
I have included another scope plot along with the corresponding code snippet:
