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TMS320F28375S: ADC Synchronous operation

Sai Kiran Reddy Patlolla
Prodigy 220 points
Part Number: TMS320F28375S
Other Parts Discussed in Thread: C2000WARE

Dear team,

I am using TMS320F2837S controller 100pin package. I have total 14 Analog inputs, 7 for each ADC Core (A and B). In that for one analog channel I need more acquisation window. For rest of the channels I have used 140nS acquisation window, for one channel in ADC A core I used 900nS Acquisation window. So, synchronous operation is not possible.  I have tested 140nS aquisation is sufficient and works fine for remaining channels. In datasheet, for 375S 100 Pin 12 bit ADC, in ENOB value, mentioned not supported. 

1. Why the limitation is only in 100 pin version?

2. What happens if I go for asynchronous operation in 100 pin package of 375S controller?

3. What happens if there is slight difference (<1 uS) between 2 ADC cores conversion?

  • 0
    TI__Guru 60865 points
    Hi Sai,

    1+2) The performance degrades due to the specific configuration of the ADC high and low reference pins in this package if the ADCs are operating asynchronously. Here 'not supported' means that the performance is quite bad and/or not fully characterized.

    3) Any delta in timing where the ADCs are not running in lock-step is a concern.

    Is the only issue that one channel on ADC-A needs a longer S+H duration? (there aren't multiple asynchronous trigger sources?) It should be possible to just increase the S+H of the corresponding SOC on ADC-B; assuming 140ns is sufficient you should not see any difference in converted value with a longer than sufficient S+H duration.

    e.g.

    ADC-A: SOC0 to SOC5: S+H = 140ns, SOC6 = 900ns
    ADC-B: SOC0 to SOC5: S+H = 140ns, SOC6 = 900ns
    (All SOCs use the same trigger)

    Or, if you want the samples for SOC0 to SOC7 on ADC-B to be evenly spaced:

    ADC-A: SOC0 = 900ns, SOC1 to SOC6: S+H = 140ns,
    ADC-B: SOC0 = 900ns, SOC1 to SOC6: S+H = 140ns,
    (All SOCs use the same trigger)
  • 0 in reply to Devin Cottier
    Prodigy 220 points

    Hi,

    Thanks for the reply.

    I am using initial software trigger to all ADC channels i.e., SOC0 to SOC6. Generating ADCINT1 for EOC6. Now ADCINT1 will trigger SOC0 to SOC6 and the process continues. In this way ADC is operating in continuous mode.

    Initially for giving software force trigger for both ADC cores,  two instructions need to be written. For execution of first instruction it is taking 2 system clocks. So,  there will be delay of 10nS for 200MHZ clock between two ADC cores. Due to this delay two adc's will be in asynchronous mode for continuous operation.

    1. How to operate ADCA and ADCB in synchronous mode without using any other interrupts i.e., adc's to be in synchronous mode without using timer,  gpio, epwm etc (initial software force trigger can be used)?

  • 0 in reply to Sai Kiran Reddy Patlolla
    TI__Guru 60865 points
    Hi Sai,

    The ADC trigger is an OR of the ADCINT flag trigger and the trigger selected via the SOC.trigsel setting. So you can definitely use one of the things you listed as the initial trigger, then let the ADC continuously convert.

    Check out the synchronous SW force example in C2000ware:
    \device_support\f2837xs\examples\cpu1\adc_soc_software_sync

    This one is using a GPIO fed internally to the XBAR (but you could do something similar using one of the other modules to create a one-time trigger).