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CCS/TMS320F28335: Ram configuration in the linker cmd file.

Part Number: TMS320F28335


Tool/software: Code Composer Studio

I am trying to increase how much ram I can use but to no avail. I am not really sure which of the RAML1 to 7 I am supposed to increase and I have tried increasing a few of their length = 0x001000 to 0x002000 but nothing has changed or am I supposed to somehow tell the cmd which RAM I want to use?

I am still experimenting with the 28335_RAM_lnk.cmd file that was provided in the CCS project. I want to know how much of the ram I can use too. 

Below is an example code I used to test the current memory limits.

int main(void)
{
//float data[512];
int i[30101];
int j;
float a[17716];

i[2] = 0;
j = 6;

a[2] = 0.1;

i[2] = j + i[2] + 1;

j = i[2] + (int)(a[2]);

return i[2];
}

I am very inexperienced in terms of coding and dsp programming, would appreciate the help a lot.

  • Hello

    If it is saying you don't have enough memory, it could be that it can't break down the blocks small enough to fit into the memories setup in the linker.
    There is nothing stopping you from commenting out RAML1 to 7 and creating a single RAM memory that covers the full length of RAML1 to 7.

    Use the section part of the linker to assign different parts of the code to different memories.

    Here are some wikis on the linkers:
    processors.wiki.ti.com/.../C28x_Compiler_-_Understanding_Linking
    processors.wiki.ti.com/.../Linker_Command_File_Primer

    Best regards
    Chris
  • Hi Chris

    I have made some changes to the linker but I am still getting this error below.

    >> Compilation failure
    SRC/subdir_rules.mk:7: recipe for target 'SRC/main.obj' failed
    >> INTERNAL ERROR: Space required for local variables exceeds maximum in _main

    This may be a serious problem. Please contact customer support with a
    description of this problem and a sample of the source files that caused this
    INTERNAL ERROR message to appear.

    Cannot continue compilation - ABORTING!

    gmake: *** [SRC/main.obj] Error 1
    gmake: Target 'all' not remade because of errors.

    int main(void)
    {
    	//float data[512];
    	int i[30101];
    	int j;
    	float a[17717];  /* 17716 does not exeed space required for local variables */
    
    	i[2] = 10;
    	j = 6;
    
    	a[2] = 0.1;
    
    	i[2] = j + i[2] + 1;
    
    	j = i[2] + (int)(a[2]);
    
    	return i[2];
    }
    Example code^

    MEMORY
    {
    PAGE 0 :
       /* BEGIN is used for the "boot to SARAM" bootloader mode      */
    
       BEGIN      : origin = 0x000000, length = 0x000002     /* Boot to M0 will go here                      */
       /* RAMM0      : origin = 0x000050, length = 0x004FB0 */
       RAML0      : origin = 0x040000, length = 0x070000
       /*RAML1      : origin = 0x070000, length = 0x020000
       RAML2      : origin = 0x090000, length = 0x010000
       RAML3      : origin = 0x0A0000, length = 0x010000*/
       ZONE7A     : origin = 0x120000, length = 0x060000    /* XINTF zone 7 - program space */
       CSM_RSVD   : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
       CSM_PWL    : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA            */
       ADC_CAL    : origin = 0x380080, length = 0x000009
       RESET      : origin = 0x3FFFC0, length = 0x000002
       IQTABLES   : origin = 0x3FE000, length = 0x000b50
       IQTABLES2  : origin = 0x3FEB50, length = 0x00008c
       FPUTABLES  : origin = 0x3FEBDC, length = 0x0006A0
       BOOTROM    : origin = 0x3FF27C, length = 0x000D44
    
    
    PAGE 1 :
       /* BOOT_RSVD is used by the boot ROM for stack.               */
       /* This section is only reserved to keep the BOOT ROM from    */
       /* corrupting this area during the debug process              */
    
       BOOT_RSVD  : origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */
       RAMM0      : origin = 0x000050, length = 0x02FFB0     /* on-chip RAM block M1 */
       RAMM1	  : origin = 0x0B0000, length = 0x010000
       RAML4      : origin = 0x0C0000, length = 0x060000
       /*RAML5      : origin = 0x0E0000, length = 0x020000
       RAML6      : origin = 0x100000, length = 0x010000
       RAML7      : origin = 0x110000, length = 0x010000
       ZONE7B     : origin = 0x180000, length = 0x070000*/     /* XINTF zone 7 - data space */
    }
    
    
    SECTIONS
    {
       /* Setup for "boot to SARAM" mode:
          The codestart section (found in DSP28_CodeStartBranch.asm)
          re-directs execution to the start of user code.  */
       codestart        : > BEGIN,     PAGE = 0
       ramfuncs         : > RAML0,     PAGE = 0
       .text            : > RAML0,     PAGE = 0
       /*.text            : > RAML1,     PAGE = 0*/
       .cinit           : > RAML0,     PAGE = 0
       .pinit           : > RAML0,     PAGE = 0
       .switch          : > RAML0,     PAGE = 0
    
       .stack           : > RAMM0,     PAGE = 1
       .ebss            : > RAML4,     PAGE = 1
       .econst          : > RAML4,     PAGE = 1
       /*.econst          : > RAML5,     PAGE = 1*/
       .esysmem         : > RAMM1,     PAGE = 1
    
       IQmath           : > RAML0,     PAGE = 0
       /*IQmath           : > RAML1,     PAGE = 0*/
       IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD
    
       /* Uncomment the section below if calling the IQNexp() or IQexp()
          functions from the IQMath.lib library in order to utilize the
          relevant IQ Math table in Boot ROM (This saves space and Boot ROM
          is 1 wait-state). If this section is not uncommented, IQmathTables2
          will be loaded into other memory (SARAM, Flash, etc.) and will take
          up space, but 0 wait-state is possible.
       */
       /*
       IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
       {
    
                  IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
    
       }
       */
    
       FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
    
       DMARAML4         : > RAML4,     PAGE = 1
       /*DMARAML5         : > RAML5,     PAGE = 1
       DMARAML6         : > RAML6,     PAGE = 1
       DMARAML7         : > RAML7,     PAGE = 1*/
    
       ZONE7DATA        : > ZONE7B,    PAGE = 1
    
       .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used                    */
       csm_rsvd         : > CSM_RSVD   PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
       csmpasswds       : > CSM_PWL    PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
    
       /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
       .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
    
    }
    Edited linker^

    MEMORY
    {
    PAGE 0 :
       /* BEGIN is used for the "boot to SARAM" bootloader mode      */
    
       BEGIN      : origin = 0x000000, length = 0x000002     /* Boot to M0 will go here                      */
       RAMM0      : origin = 0x000050, length = 0x0003B0
       RAML0      : origin = 0x008000, length = 0x001000
       RAML1      : origin = 0x009000, length = 0x001000
       RAML2      : origin = 0x00A000, length = 0x001000
       RAML3      : origin = 0x00B000, length = 0x001000
       ZONE7A     : origin = 0x200000, length = 0x00FC00    /* XINTF zone 7 - program space */
       CSM_RSVD   : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
       CSM_PWL    : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA            */
       ADC_CAL    : origin = 0x380080, length = 0x000009
       RESET      : origin = 0x3FFFC0, length = 0x000002
       IQTABLES   : origin = 0x3FE000, length = 0x000b50
       IQTABLES2  : origin = 0x3FEB50, length = 0x00008c
       FPUTABLES  : origin = 0x3FEBDC, length = 0x0006A0
       BOOTROM    : origin = 0x3FF27C, length = 0x000D44
    
    
    PAGE 1 :
       /* BOOT_RSVD is used by the boot ROM for stack.               */
       /* This section is only reserved to keep the BOOT ROM from    */
       /* corrupting this area during the debug process              */
    
       BOOT_RSVD  : origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */
       RAMM1      : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
       RAML4      : origin = 0x00C000, length = 0x001000
       RAML5      : origin = 0x00D000, length = 0x001000
       RAML6      : origin = 0x00E000, length = 0x001000
       RAML7      : origin = 0x00F000, length = 0x001000
       ZONE7B     : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
    }
    
    
    SECTIONS
    {
       /* Setup for "boot to SARAM" mode:
          The codestart section (found in DSP28_CodeStartBranch.asm)
          re-directs execution to the start of user code.  */
       codestart        : > BEGIN,     PAGE = 0
       ramfuncs         : > RAML0,     PAGE = 0
       .text            : > RAML1,     PAGE = 0
       .cinit           : > RAML0,     PAGE = 0
       .pinit           : > RAML0,     PAGE = 0
       .switch          : > RAML0,     PAGE = 0
    
       .stack           : > RAMM1,     PAGE = 1
       .ebss            : > RAML4,     PAGE = 1
       .econst          : > RAML5,     PAGE = 1
       .esysmem         : > RAMM1,     PAGE = 1
    
       IQmath           : > RAML1,     PAGE = 0
       IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD
    
       /* Uncomment the section below if calling the IQNexp() or IQexp()
          functions from the IQMath.lib library in order to utilize the
          relevant IQ Math table in Boot ROM (This saves space and Boot ROM
          is 1 wait-state). If this section is not uncommented, IQmathTables2
          will be loaded into other memory (SARAM, Flash, etc.) and will take
          up space, but 0 wait-state is possible.
       */
       /*
       IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
       {
    
                  IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
    
       }
       */
    
       FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
    
       DMARAML4         : > RAML4,     PAGE = 1
       DMARAML5         : > RAML5,     PAGE = 1
       DMARAML6         : > RAML6,     PAGE = 1
       DMARAML7         : > RAML7,     PAGE = 1
    
       ZONE7DATA        : > ZONE7B,    PAGE = 1
    
       .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used                    */
       csm_rsvd         : > CSM_RSVD   PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
       csmpasswds       : > CSM_PWL    PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
    
       /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
       .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
    
    }
    Default linker^

    I have tried different origins and lengths combining multiple rams into one but I still don't get what's wrong.

    Sincerely

    Zheng Jie

  • Hello

    Your edits of the linker are incorrect, you can't assign just any origin or length, it has to align with the actual memory space on the device.
    For example, if you were to combine all of the RAMLs, you would comment out RAML0 to RAML7 and create single entry such as:
    RAML0_7 : origin = 0x008000, length = 0x008000 (doesn't matter if you put it on page 0 or page 1)

    Even with that correction, there is a limit to how much space local variables can take in a single function. See this post for more details:
    e2e.ti.com/.../86094

    Best regards
    Chris
  • I have reduced the length to allow enough space according to the memory taken up by each section shown in the memory map and the error is gone. Thanks for enlightening me Chris!

    Best regards

    Zheng Jie