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TMS320F28377D: C28x 32bit registers not accepting 32bit values.

Peter Adamcik
Expert 1425 points
Part Number: TMS320F28377D

Hi Guys, I've finally got my F28377D running and programming but I've come up with a serious problem. 

The C28x CPU manual says that the following AUX CPU registers are 32BITS wide. ACC, XAR0, XAR1, XAR2, XAR3, XAR4, XAR5, XAR6 and XAR7.

The manual also says that the C28x has a 32bit data bus and a 32bit address bus.

The maximum value the 32bit registers will accept is 0xFFFFF. 5 F's.

I've tried the following:

MOVL XAR2, #0xFFFFFFFF ; 8 F's 32 bit. Assembler says value to big. This works with other 32bit micro controllers. e.g. PIC32MZ which I program in assembler as well.

MOVL XAR2, #0xFFFFF       ; 5 F's and its ok. Does that mean the maximum value any register can handle is 0xFFFFF. 

With the project i'm working on I desparatly NEED to put 32bit values in registers. 

I've set it up in C28x mode as well. 

So am I doing something wrong or is the CPU manual wrong or what is the problem? Why won't the 32bit registers accept 32bit values?

I've tried every addressing mode the manual says but still no go.

Thanks guys and hope to hear from you soon.

Pete. :)

  • 0
    TI__Mastermind 27200 points
    Pete,

    The registers you list are 32-bits wide, however on C28x the opcode size is also 32-bits (since one instruction read per clock cycle). If all 32-bits were available for the immediate there would be no opcode space to encode the instruction.

    The largest immediate you can load into an auxiliary register is 22-bits. So for example, you could do:
    MOVL XAR2, #0x3FFFFF

    ...but, this will not work:
    MOVL XAR2, #0x4FFFFF

    To load all 32-bits from an immediate you need to do it in two operations. For example, using the accumulator:
    MOV AL, #0xFFFF
    MOV AH, #0xFFFF
    MOVL XAR2, ACC

    Regards,

    Richard
  • 0 in reply to Richard Poley
    Expert 1425 points
    Hi Richard, I figured I had to do it like that. The problem with that is that it will take 3 clock cycles to do it and I'd rather do it in one. Also, If I read or write data to an external SRAM 32bits wide how can I do it in one clock cycle? I want to have the SRAM Address lines on XAR1 PORTA and the 32bit databus on XAR2 PORTB. Set the address, put the data on the databus and write to the SRAM.

    I'll have to halve the SRAM address and then halve the SRAM data and then put it on the ports, too much time wasting. I need the fastest speed to and from my SRAM. Let me know your thoughts.
    Thanks Richard, Pete. :)
  • 0 in reply to Peter Adamcik
    TI__Mastermind 27200 points
    Hi Pete,

    If you can structure the register writes to use indirect addressing, that would be a single cycle operation from the CPU point of view. e.g.
    MOVL XAR2, *XAR1++

    Not sure whether it's possible for you to order the writes in this way. Your first post looked like you wanted immediate mode, so I guess not.

    Regret I don't have any experience with the EMIF on this device. Please post back if you need anything more on that. Thanks.

    Regards,

    Richard