CCS/TMS320F28379D: Running two individual adc operation on two CPUs (ADCA on CPU2 and ADCC on CPU1)

nolan

Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Hi,

I went through the dual programming examples in the <C2000WARE> , specifically adc_epwm project .

In the example code the project description is "This example demonstrates how to make use of the ADC and EPWM peripherals from CPU2. Device clocking (PLL) and GPIO setup are done using CPU1, while all other configuration of the peripherals is done using CPU2." I code works fine .

I edited the above code for my use to run two different adc_continuous code , that is to Run two individual adc conversion operation on two CPUs (ADCA on CPU2 and ADCC on CPU1)

I have edited the c files (adc_epwm_cpu1.c and adc_epwm_cpu2.c) accordingly and i will be pasting the code below.

So the problem i am facing is :

Objective: To run ADCC(adc_continuous project ) in CPU1 and ADCA in CPU2 by transferring the ADCC ownership to CPU2 from CPU1.

RESULT: When the CPU1 was run after debugging the adc program was running on ADCC register , but when the CPU2 was run (both the CPUs running ) the adc operation in cpu1 was suspended and ADCA was working . By changing the code in cpu1 with different methods i come to the conclusion that only one adc was running at a time .
when CPU1 is run ADCC working
when CPU1 and CPU2 is run ADCA is working but ADCC is suspended .

adc_epwm_cpu1 code

#include "F28x_Project.h"

#define RESULTS_BUFFER_SIZE 256

void ConfigureADC(void);
void SetupADCContinuous(Uint16 channel);

Uint16 AdccResults[RESULTS_BUFFER_SIZE];
Uint16 resultsIndex;

//
// Main
//
void main(void)
{
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
InitSysCtrl();

//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//
InitGpio();

//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
DINT;

//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
InitPieCtrl();

//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
InitPieVectTable();

//
// Enable global Interrupts and higher priority real-time debug events:
//
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM

//
// Transfer ownership of ADCA to CPU02
//
EALLOW;
DevCfgRegs.CPUSEL11.bit.ADC_A = 1;
EDIS;

ConfigureADC();
SetupADCContinuous(3);

for(resultsIndex = 0; resultsIndex < RESULTS_BUFFER_SIZE; resultsIndex++)
{
AdccResults[resultsIndex] = 0;
}
resultsIndex = 0;

do
{
//
//enable ADCINT flags
//
EALLOW;
AdccRegs.ADCINTSEL1N2.bit.INT1E = 1;
AdccRegs.ADCINTSEL1N2.bit.INT2E = 1;
AdccRegs.ADCINTSEL3N4.bit.INT3E = 1;
AdccRegs.ADCINTSEL3N4.bit.INT4E = 1;
AdccRegs.ADCINTFLGCLR.all = 0x000F;
EDIS;

//
//initialize results index
//
resultsIndex = 0;

//
//software force start SOC0 to SOC7
//
AdccRegs.ADCSOCFRC1.all = 0x0FFF;

//
//keep taking samples until the results buffer is full
//
while(resultsIndex < RESULTS_BUFFER_SIZE)
{
//
//wait for first set of 8 conversions to complete
//
while(0 == AdccRegs.ADCINTFLG.bit.ADCINT3);

//
//clear both INT flags generated by first 8 conversions
//
AdccRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
AdccRegs.ADCINTFLGCLR.bit.ADCINT3 = 1;

//
//save results for first 8 conversions
//
//note that during this time, the second 8 conversions have
//already been triggered by EOC6->ADCIN1 and will be actively
//converting while first 8 results are being saved
//
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT0;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT1;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT2;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT3;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT4;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT5;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT6;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT7;

//
//wait for the second set of 8 conversions to complete
//
while(0 == AdccRegs.ADCINTFLG.bit.ADCINT4);

//
//clear both INT flags generated by second 8 conversions
//
AdccRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;
AdccRegs.ADCINTFLGCLR.bit.ADCINT4 = 1;

//
//save results for second 8 conversions
//
//note that during this time, the first 8 conversions have
//already been triggered by EOC14->ADCIN2 and will be actively
//converting while second 8 results are being saved
//
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT8;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT9;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT10;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT11;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT12;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT13;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT14;
AdccResults[resultsIndex++] = AdccResultRegs.ADCRESULT15;
}

//
//disable all ADCINT flags to stop sampling
//
EALLOW;
AdccRegs.ADCINTSEL1N2.bit.INT1E = 0;
AdccRegs.ADCINTSEL1N2.bit.INT2E = 0;
AdccRegs.ADCINTSEL3N4.bit.INT3E = 0;
AdccRegs.ADCINTSEL3N4.bit.INT4E = 0;
EDIS;

//
//at this point, AdcaResults[] contains a sequence of conversions
//from the selected channel
//

//
//software breakpoint, hit run again to get updated conversions
//
// asm(" ESTOP0");
}while(1);
}

//
// ConfigureADC - Write ADC configurations and power up the ADC for both
// ADC A and ADC B
//+
void ConfigureADC(void)
{
EALLOW;

//
//write configurations
//
AdccRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
AdcSetMode(ADC_ADCC, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);

//
//Set pulse positions to late
//
AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1;

//
//power up the ADC
//
AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;

//
//delay for 1ms to allow ADC time to power up
//
DELAY_US(1000);

EDIS;
}

//
// SetupADCContinuous - setup the ADC to continuously convert on one channel
//
void SetupADCContinuous(Uint16 channel)
{
Uint16 acqps;

//
// Determine minimum acquisition window (in SYSCLKS) based on resolution
//
if(ADC_RESOLUTION_12BIT == AdccRegs.ADCCTL2.bit.RESOLUTION)
{
acqps = 14; //75ns
}
else //resolution is 16-bit
{
acqps = 63; //320ns
}

EALLOW;
AdccRegs.ADCSOC0CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC1CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC2CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC3CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC4CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC5CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC6CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC7CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC8CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC9CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC10CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC11CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC12CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC13CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC14CTL.bit.CHSEL = channel; //SOC will convert on channel
AdccRegs.ADCSOC15CTL.bit.CHSEL = channel; //SOC will convert on channel

AdccRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC2CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC4CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC5CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC6CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC7CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC8CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC9CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC10CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC11CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC12CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC13CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC14CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles
AdccRegs.ADCSOC15CTL.bit.ACQPS = acqps; //sample window is acqps +
//1 SYSCLK cycles

AdccRegs.ADCINTSEL1N2.bit.INT1E = 0; //disable INT1 flag
AdccRegs.ADCINTSEL1N2.bit.INT2E = 0; //disable INT2 flag
AdccRegs.ADCINTSEL3N4.bit.INT3E = 0; //disable INT3 flag
AdccRegs.ADCINTSEL3N4.bit.INT4E = 0; //disable INT4 flag

AdccRegs.ADCINTSEL1N2.bit.INT1CONT = 0;
AdccRegs.ADCINTSEL1N2.bit.INT2CONT = 0;
AdccRegs.ADCINTSEL3N4.bit.INT3CONT = 0;
AdccRegs.ADCINTSEL3N4.bit.INT4CONT = 0;

AdccRegs.ADCINTSEL1N2.bit.INT1SEL = 6; //end of SOC6 will set INT1 flag
AdccRegs.ADCINTSEL1N2.bit.INT2SEL = 14; //end of SOC14 will set INT2 flag
AdccRegs.ADCINTSEL3N4.bit.INT3SEL = 7; //end of SOC7 will set INT3 flag
AdccRegs.ADCINTSEL3N4.bit.INT4SEL = 15; //end of SOC15 will set INT4 flag

//
//ADCINT2 will trigger first 8 SOCs
//
AdccRegs.ADCINTSOCSEL1.bit.SOC0 = 2;
AdccRegs.ADCINTSOCSEL1.bit.SOC1 = 2;
AdccRegs.ADCINTSOCSEL1.bit.SOC2 = 2;
AdccRegs.ADCINTSOCSEL1.bit.SOC3 = 2;
AdccRegs.ADCINTSOCSEL1.bit.SOC4 = 2;
AdccRegs.ADCINTSOCSEL1.bit.SOC5 = 2;
AdccRegs.ADCINTSOCSEL1.bit.SOC6 = 2;
AdccRegs.ADCINTSOCSEL1.bit.SOC7 = 2;

//
//ADCINT1 will trigger second 8 SOCs
//
AdccRegs.ADCINTSOCSEL2.bit.SOC8 = 1;
AdccRegs.ADCINTSOCSEL2.bit.SOC9 = 1;
AdccRegs.ADCINTSOCSEL2.bit.SOC10 = 1;
AdccRegs.ADCINTSOCSEL2.bit.SOC11 = 1;
AdccRegs.ADCINTSOCSEL2.bit.SOC12 = 1;
AdccRegs.ADCINTSOCSEL2.bit.SOC13 = 1;
AdccRegs.ADCINTSOCSEL2.bit.SOC14 = 1;
AdccRegs.ADCINTSOCSEL2.bit.SOC15 = 1;
EDIS;
}

adc_epwm_cpu2 code

#include "F28x_Project.h"

//
// Defines
//
#define RESULTS_BUFFER_SIZE 256 // buffer for storing conversion results
// (size must be multiple of 16)
//
// Globals
//
Uint16 AdcaResults[RESULTS_BUFFER_SIZE];
Uint16 resultsIndex;

//
// Function Prototypes
//
void ConfigureADC(void);
void SetupADCContinuous(Uint16 channel);
//
// Main
//
void main(void)
{
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
InitSysCtrl();

//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//
// InitGpio(); // Skipped for this example

//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
DINT;

//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;

//
// Power up the ADC
//
EALLOW;
CpuSysRegs.PCLKCR13.bit.ADC_A = 1;

//
// Configure the ADC and power it up
//
ConfigureADC();

//
// Setup the ADC for continuous conversions on channel 0
//
SetupADCContinuous(0);

//
// Enable global Interrupts and higher priority real-time debug events:
//
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM

//
// Initialize results buffer
//
for(resultsIndex = 0; resultsIndex < RESULTS_BUFFER_SIZE; resultsIndex++)
{
AdcaResults[resultsIndex] = 0;
}
resultsIndex = 0;

EALLOW;

//
// take conversions indefinitely in loop
//
do
{
//
//enable ADCINT flags
//
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;
AdcaRegs.ADCINTSEL1N2.bit.INT2E = 1;
AdcaRegs.ADCINTSEL3N4.bit.INT3E = 1;
AdcaRegs.ADCINTSEL3N4.bit.INT4E = 1;
AdcaRegs.ADCINTFLGCLR.all = 0x000F;

//
//initialize results index
//
resultsIndex = 0;

//
//software force start SOC0 to SOC7
//
AdcaRegs.ADCSOCFRC1.all = 0x00FF;

//
//keep taking samples until the results buffer is full
//
while(resultsIndex < RESULTS_BUFFER_SIZE)
{
//
//wait for first set of 8 conversions to complete
//
while(0 == AdcaRegs.ADCINTFLG.bit.ADCINT3);

//
//clear both INT flags generated by first 8 conversions
//
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
AdcaRegs.ADCINTFLGCLR.bit.ADCINT3 = 1;

//
//save results for first 8 conversions
//
//note that during this time, the second 8 conversions have
//already been triggered by EOC6->ADCIN1 and will be actively
//converting while first 8 results are being saved
//
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT0;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT1;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT2;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT3;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT4;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT5;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT6;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT7;

//
//wait for the second set of 8 conversions to complete
//
while(0 == AdcaRegs.ADCINTFLG.bit.ADCINT4);

//
//clear both INT flags generated by second 8 conversions
//
AdcaRegs.ADCINTFLGCLR.bit.ADCINT2 = 1;
AdcaRegs.ADCINTFLGCLR.bit.ADCINT4 = 1;

//
//save results for second 8 conversions
//
//note that during this time, the first 8 conversions have
//already been triggered by EOC14->ADCIN2 and will be actively
//converting while second 8 results are being saved
//
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT8;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT9;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT10;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT11;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT12;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT13;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT14;
AdcaResults[resultsIndex++] = AdcaResultRegs.ADCRESULT15;
}

//
//disable all ADCINT flags to stop sampling
//
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 0;
AdcaRegs.ADCINTSEL1N2.bit.INT2E = 0;
AdcaRegs.ADCINTSEL3N4.bit.INT3E = 0;
AdcaRegs.ADCINTSEL3N4.bit.INT4E = 0;

//
//at this point, AdcaResults[] contains a sequence of conversions
//from the selected channel
//

//
//software breakpoint, hit run again to get updated conversions
//
// asm(" ESTOP0");
DELAY_US(1000);
}while(1);
}

//
// ConfigureADC - Write ADC configurations and power up the ADC for
// both ADC A and ADC B
//
void ConfigureADC(void)
{
EALLOW;

//
//write configurations
//
AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);

//
//Set pulse positions to late
//
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;

//
//power up the ADC
//
AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;

//
//delay for 1ms to allow ADC time to power up
//
DELAY_US(1000);

EDIS;
}

//
// SetupADCContinuous - Setup the ADC to continuously convert on one channel
//
void SetupADCContinuous(Uint16 channel)
{
Uint16 acqps;

//
// Determine minimum acquisition window (in SYSCLKS) based on resolution
//
if(ADC_RESOLUTION_12BIT == AdcaRegs.ADCCTL2.bit.RESOLUTION)
{
acqps = 14; //75ns
}
else // resolution is 16-bit
{
acqps = 63; //320ns
}

EALLOW;
AdcaRegs.ADCSOC0CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC1CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC2CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC3CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC4CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC5CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC6CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC7CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC8CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC9CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC10CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC11CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC12CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC13CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC14CTL.bit.CHSEL = channel; //SOC will convert on channel
AdcaRegs.ADCSOC15CTL.bit.CHSEL = channel; //SOC will convert on channel

AdcaRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC2CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC4CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC5CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC6CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC7CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC9CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC10CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC11CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC12CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC13CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC14CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles
AdcaRegs.ADCSOC15CTL.bit.ACQPS = acqps; //sample is acqps + 1 SYSCLK cycles

AdcaRegs.ADCINTSEL1N2.bit.INT1E = 0; //disable INT1 flag
AdcaRegs.ADCINTSEL1N2.bit.INT2E = 0; //disable INT2 flag
AdcaRegs.ADCINTSEL3N4.bit.INT3E = 0; //disable INT3 flag
AdcaRegs.ADCINTSEL3N4.bit.INT4E = 0; //disable INT4 flag

AdcaRegs.ADCINTSEL1N2.bit.INT1CONT = 0;
AdcaRegs.ADCINTSEL1N2.bit.INT2CONT = 0;
AdcaRegs.ADCINTSEL3N4.bit.INT3CONT = 0;
AdcaRegs.ADCINTSEL3N4.bit.INT4CONT = 0;

AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 6; //end of SOC6 will set INT1 flag
AdcaRegs.ADCINTSEL1N2.bit.INT2SEL = 14; //end of SOC14 will set INT2 flag
AdcaRegs.ADCINTSEL3N4.bit.INT3SEL = 7; //end of SOC7 will set INT3 flag
AdcaRegs.ADCINTSEL3N4.bit.INT4SEL = 15; //end of SOC15 will set INT4 flag

//
//ADCINT2 will trigger first 8 SOCs
//
AdcaRegs.ADCINTSOCSEL1.bit.SOC0 = 2;
AdcaRegs.ADCINTSOCSEL1.bit.SOC1 = 2;
AdcaRegs.ADCINTSOCSEL1.bit.SOC2 = 2;
AdcaRegs.ADCINTSOCSEL1.bit.SOC3 = 2;
AdcaRegs.ADCINTSOCSEL1.bit.SOC4 = 2;
AdcaRegs.ADCINTSOCSEL1.bit.SOC5 = 2;
AdcaRegs.ADCINTSOCSEL1.bit.SOC6 = 2;
AdcaRegs.ADCINTSOCSEL1.bit.SOC7 = 2;

//
//ADCINT1 will trigger second 8 SOCs
//
AdcaRegs.ADCINTSOCSEL2.bit.SOC8 = 1;
AdcaRegs.ADCINTSOCSEL2.bit.SOC9 = 1;
AdcaRegs.ADCINTSOCSEL2.bit.SOC10 = 1;
AdcaRegs.ADCINTSOCSEL2.bit.SOC11 = 1;
AdcaRegs.ADCINTSOCSEL2.bit.SOC12 = 1;
AdcaRegs.ADCINTSOCSEL2.bit.SOC13 = 1;
AdcaRegs.ADCINTSOCSEL2.bit.SOC14 = 1;
AdcaRegs.ADCINTSOCSEL2.bit.SOC15 = 1;
}

I have attached the screenshot in the case2(both the cpus running )