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TMS320F28375D: SCI Flash Kernel: Verify Error on Unwritten Address

Mike Banducci86
Prodigy 170 points
Part Number: TMS320F28375D
Other Parts Discussed in Thread: CONTROLSUITE, UNIFLASH

I am using the SCI bootloader to load the CPU1 flash kernel provided in ControlSUITE (F2837xD_sci_flash_kernels_cpu01), then using that kernel to load a generated TI Boot Hex file.

Upon completion, I'm getting an error. The error code is 0x3000 (Verify Error) at address 0x00080000. The problem here is that the image I'm flashing doesn't write anything to address 0x00080000.

Without giving away anything proprietary, I have some data that I took from the firmware file that lists each chunk of data and its location:

Address: 0x00088120 Size: 0x0054
Address: 0x00096E40 Size: 0xAD7C
Address: 0x000A2690 Size: 0x0805
Address: 0x00088174 Size: 0x0004
Address: 0x000885B0 Size: 0x0100
Address: 0x0031CD80 Size: 0x1B80
Address: 0x0031E900 Size: 0x0180
Address: 0x000886B0 Size: 0x0068
Address: 0x000A355C Size: 0x05CC
Address: 0x00088180 Size: 0x0430
Address: 0x000A2E98 Size: 0x06C4
Address: 0x0008BB50 Size: 0xB2C0
Address: 0x000A1BBC Size: 0x0AD4
Address: 0x000A3B28 Size: 0x055C
Address: 0x0008B000 Size: 0x0B50
Address: 0x00088000 Size: 0x0120

From the list, it's clear that nothing is going into the 0x00080000 address, nor is it even touching that flash sector. I've looked through the provided source code for the flash kernel, but it's still unclear why the kernel thinks that it should be writing to the address in question.

What is going on here, and is it something I can fix / avoid / work around?

Thank you!

  • 0
    TI__Guru* 87145 points

    Hi Mike,

    0x80000 is the Flash entry point.  When flash boot is selected, BootROM jumps to this address at the end of bootcode execution.  Hence, in the TI provided Flash based linker cmd files, you might have noticed that the codestart section is mapped to this address. Can you check your linker cmd and hex file to see if codestart is mapped to that address?

    We can debug further based on your reply.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Prodigy 170 points
    This is a multi-piece application, so I am intentionally not writing codestart. The value for the jump address will be set by a different operation or will already be resident in flash.
  • 0 in reply to Mike Banducci86
    TI__Guru* 87145 points
    Hi Mike,

    Got it. Thank you for the clarification.
    Let me understand few more details here. Do you have anything mapped in the address range - 0x00080000 to 0x00080007?

    After the failure, what do you see in this address range? No need to reveal anything proprietary. Just want to know if everything is as expected (inspite of the verify failure error) or do you see any unexpected data in there?

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    Prodigy 170 points
    Thanks for the quick responses! :)

    I do not have anything mapped to that space - I double checked the map file after compilation to be sure. I read back the beginning of flash via JTAG after running an SCI update with the file and the output shows that the first 8 bytes (and the entirety of Flash Sector A) are 0xFF. I'm reading back using UniFlash 3.4 and a Spectrum Digital XDS510.

    I've checked locations where I know I should have data, and the data looks correct. I have not done a full check to make sure it's byte-perfect, though - just spot checking the start and end values for sections that I expect.
  • 0 in reply to Mike Banducci86
    TI__Guru* 87145 points
    Hi Mike,

    Thank you for confirming that the data programmed is as expected. That's what I thought.

    Let me look in to the reason on why verify got triggered for a location that was not programmed by the kernel. I should be able to get back to you in a day or two.

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    Prodigy 170 points
    Understood, thank you!
  • 0 in reply to Mike Banducci86
    Prodigy 170 points

    Hi!

    I created a raw binary file based on my boot hex file and used it to compare what I read off the device with what I'd expect to see, and I learned something interesting - I see a number of seemingly random blocks of 4 words (8 bytes) that are written as all 0s instead of the proper data. There does not seem to be a pattern to these locations, and I have confirmed that they are not part of the boot hex file. They all start at 4-word-aligned addresses.

    I'm willing to guess this is related to my other issue, as these blocks would certainly cause validation issues. Still, none of them are at the address given by the flash kernel upon completion.

    Do you have any idea why I would see sets of 0x0000 0x0000 0x0000 0x0000 written instead of data?

    Thanks!

    Update: I performed the update using SCI multiple times and the blank spots always appear at the same addresses.

  • 0 in reply to Mike Banducci86
    TI__Guru* 87145 points
    Hi Mike,

    Thank you for the info.
    Do you see zeros for a max of 4 words or 8 words (on 8-word aligned address)?

    In your linker cmd file, do you align sections on 64-bit boundary using ALIGN(4)? This helps to align sections on 64-bit boundary - so that a new section always starts on new 64-bit boundary. This way, when streaming the hex file, all the 64-bits can be programmed at once (for ECC reason) without inserting any zeros/ones.

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    Prodigy 170 points
    I'm seeing them as 4-word chunks on 4-word-aligned addresses in the middle of sections where there should be data. I'm working on generating a test pattern file that exhibits the same issue so I can provide it to you.

    All of the sections I'm trying to write appear to respect 4-word alignment with their start addresses.
  • 0 in reply to Mike Banducci86
    TI__Guru* 87145 points
    Hi Mike,

    Thank you for the confirmation on alignment.
    When you say that "there should be data" - Is it from the same hex file? Or are you talking about data coming from other hex files? Asking since you said this is a multi-piece application.

    Please share the test pattern when you have it. That can help.

    Best regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    Prodigy 170 points

    The data that's missing here is all in the same file - The multiple-file arrangement is set up so the two pieces of code can be erased / reflashed without affecting the other, so they are kept in completely separate flash sections.

    For example, the TI Boot Hex file I'm using to perform the flash operation has this string of data:

    BF 56 3C 01 4A 76 E3 0B 49 76 E3 88 4A 76 40 3E

    and when I read back that address, I see this data instead:

    00 00 00 00 00 00 00 00 49 76 E3 88 4A 76 40 3E

    Regarding the test pattern, I created a file with an identical memory map, but for some reason I don't see the same errors in flash! I'll continue to try to reproduce the issue in a file that I'm allowed to post here.

    Thank you!

  • 0 in reply to Mike Banducci86
    Prodigy 170 points
    Hi!

    I had a small breakthrough regarding the strange 0s - I removed the sections in the TI boot hex file that were attempting to write to the EMIF (the 0x31**** addresses) and I no longer see the invalid fields in flash.

    I do still see the verification error, though, and I'm still trying to generate a test pattern file that shows the same error. It's odd - the data in the file appears to make a difference, because a file with the exact same flash sections and lengths doesn't exhibit the error when populated with a test pattern.
  • 0 in reply to Mike Banducci86
    TI__Guru* 87145 points

    Mike,

    Glad that the zeros issue is resolved.  However, I wonder why the EMIF location data is programmed at Flash addresses. I will take a note on this.

    Regarding the initial verification error:  I did not understand what you explained regarding the test pattern data mismatch.  Please explain clearly.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Prodigy 170 points

    test-rand.txt

    Thanks!

    My current issue is that I see the VERIFY_ERROR at address 0x00080000 when I try to flash my code file, but I cannot seem to induce this error when using a test pattern file with an identical memory map (same start addresses, sections, lengths, etc).

    I've attached an example of a test file (generated using random values instead of real data) that I'm using. This test file has the same map I shared above, but for some reason, it does not exhibit the verification error.

    I understand that it's hard for you to troubleshoot my issue without a concrete way to reproduce it, so I've been working on trying to replicate it. So far, I haven't had any luck.

  • 0 in reply to Mike Banducci86
    TI__Guru* 87145 points
    Mike,

    I understand. Please let us know when you get a test file that we can use to reproduce it.

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    TI__Guru* 87145 points
    Mike,

    You still see that the data at 0x80000 to 0x80007 is all 1s as expected. Correct?

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    Prodigy 170 points

    That's correct - When I read back (using UniFlash), I see those bytes as all 0xFF.

  • 0 in reply to Mike Banducci86
    TI__Guru* 87145 points
    Mike,

    We did not see Flash entry point address in the sample hex image that you attached previously.
    Header has 0x0 as the entry point - Can you try to change that and see what happens?

    I think you should load the Flash kernels via CCS for further debug. Try that. You should comment out the kernel load in Host SW when you do this.

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    Prodigy 170 points

    Hi!

    The entry point is something I'm unsure of - The images that are having trouble doesn't have an entry address, so I wanted to avoid setting one that might overwrite the 0x80000 address in flash as this would cause the chip to fail to boot into the right firmware. I've tried setting the field to all 0s and all Fs with identical results. I also ran some tests with valid addresses (i.e., 0x0080BAAB) and observed the same issue.

    I spent a little time trying to debug with the flash kernel but was unsuccessful trying to get the autobaud step to work - I'll give it another try and see if I can get it working properly.

    I got permission to provide a TI Boot Hex file for a small test project that exhibits the verification error. I've attached it here. This app won't run by itself, but it can be flashed and always returns the 0x3000 error at address 0x80000.

    Thanks!

    Fullscreen demoApp.txt Download 
    
AA 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 00 AB BA
40 00 08 00 10 81 42 41 44 43 46 45 48 47 4A 49 4C 4B 4E 4D 50 4F 02 01 
04 03 00 32 00 02 00 00 00 00 18 00 00 00 FF 00 FF 00 FF 00 FF 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF 
00 FF 00 FF 00 FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 01 0E 0F 00 00 00 00 00 00 00 00 00 00 00 00 00 01 0E 
0F 00 00 00 00 00 00 00 00 00 00 00 00 00 
08 07 08 00 00 90 04 FE 42 A8 43 2B 43 92 12 52 19 67 AC 28 06 00 43 30 
08 8F 9C 96 01 56 A4 00 C4 06 42 0F 0B 66 43 30 08 8F 9E 96 01 56 A4 00 
C4 06 42 0F 03 68 43 92 07 6F 43 0A 43 92 12 52 EB 68 A9 28 FF FF 84 FE 
06 00 08 FE 44 97 43 96 42 A8 44 92 37 61 00 02 1F 76 40 03 02 1E 04 1E 
0A 1E 0C 1E 06 1E 45 2B 45 92 40 52 2B 67 01 29 00 BE 03 56 45 03 00 8F 
C0 D0 01 56 A4 00 C4 2B 03 56 45 03 00 8F C2 D0 01 56 A4 00 C4 C2 03 56 
45 03 00 8F C1 D0 01 56 A4 00 C4 2B 03 56 45 03 00 8F C4 D0 01 56 A4 00 
C4 C2 00 8F C6 D0 03 56 45 03 01 56 A4 00 BF 56 C4 01 45 0A 45 92 40 52 
D9 68 43 92 40 52 06 69 00 9B 40 52 04 69 01 9B 02 6F 43 93 43 97 1F 76 
40 03 43 92 00 96 45 2B 45 92 12 52 2B 67 AC 28 06 00 45 30 C8 76 A0 96 
01 56 A7 00 00 8F 44 D0 45 30 01 56 A4 00 C7 92 C4 96 45 30 08 8F 9C 96 
01 56 A4 00 C4 C4 45 30 00 8F 40 D0 01 56 A4 00 C4 C2 45 30 08 8F 9E 96 
01 56 A4 00 C4 C4 45 30 00 8F 42 D0 01 56 A4 00 C4 C2 45 0A 45 92 12 52 
D9 68 45 2B 43 92 45 54 E9 FF 94 02 01 29 03 56 45 03 42 07 A9 8A C4 92 
40 52 06 68 03 56 45 08 07 50 EF FF A6 02 46 2B 46 92 40 52 23 67 01 29 
03 56 46 03 00 8F C6 D0 01 56 A4 00 C4 92 01 52 15 61 03 56 46 03 00 8F 
C0 D0 01 56 A4 00 03 56 45 03 C4 88 42 07 A9 8A C4 80 A6 06 A7 0F 06 60 
03 56 45 08 06 50 EF FF 84 02 46 0A 46 92 40 52 E0 68 03 56 45 03 42 07 
A9 8A D4 8A 48 76 00 90 47 96 01 29 03 56 45 03 42 07 A6 1E 03 56 45 03 
42 07 A9 8A CC 0E A6 8A D4 07 01 19 A9 8A 48 76 00 90 48 96 47 88 00 8F 
FF FF A9 A8 A6 0F 13 60 01 29 03 56 45 03 42 07 A9 8A 03 56 C4 03 00 8F 
C6 D0 01 56 A4 00 BF 56 C4 03 03 56 45 08 03 50 EF FF 4F 02 01 29 03 56 
45 03 42 07 A9 8A 1F 76 5B 22 38 06 D4 0F 14 69 03 56 45 03 42 07 A6 1E 
03 56 45 03 42 07 A9 8A CC 80 A6 8A A7 06 D4 07 A7 1E 01 02 38 07 A6 1E 
A7 06 A6 0F 3F 66 03 56 45 03 42 07 A9 8A 1F 76 5C 22 04 06 D4 0F 14 69 
03 56 45 03 42 07 A6 1E 03 56 45 03 42 07 A9 8A CC 80 A6 8A A7 06 D4 07 
A7 1E 01 02 04 07 A6 1E A7 06 A6 0F 23 66 03 56 45 03 42 07 A9 8A 1F 76 
5B 22 3E 06 D4 0F 14 69 03 56 45 03 42 07 A6 1E 03 56 45 03 42 07 A9 8A 
CC 80 A6 8A A7 06 D4 07 A7 1E 01 02 3E 07 A6 1E A7 06 A6 0F 07 66 03 56 
45 03 42 07 A9 8A CC 92 12 60 03 56 45 03 42 07 A9 8A 03 56 C4 03 00 8F 
C6 D0 01 56 A4 00 BF 56 C4 04 03 56 45 08 04 50 EF FF E3 01 46 2B 46 92 
40 52 E7 FF BE 00 01 29 03 56 46 03 00 8F C6 D0 01 56 A4 00 C4 92 01 52 
E1 FF AE 00 03 56 46 03 40 8F C2 D0 01 56 A5 00 03 56 45 03 42 07 A6 1E 
03 56 45 03 42 07 A9 8A CC 0E A6 8A D4 07 C5 0F 1F 69 03 56 46 03 00 8F 
C2 D0 40 8F C1 D0 01 56 A4 00 03 56 46 03 01 56 A5 00 C5 88 A6 06 C4 07 
A6 1E 03 56 45 03 42 07 A7 1E 03 56 45 03 42 07 A9 8A CC 0E A7 8A D4 07 
A6 0F E8 FF 82 00 03 56 46 03 00 8F C2 D0 01 56 A4 00 C4 C4 03 56 45 03 
42 07 A9 8A A6 06 D4 0F 1E 66 03 56 46 03 00 8F C2 D0 40 8F C1 D0 01 56 
A4 00 03 56 46 03 01 56 A5 00 C5 88 A6 06 C4 07 A6 1E 03 56 45 03 42 07 
A7 1E 03 56 45 03 42 07 A9 8A CC 0E A7 8A D4 07 A6 0F 56 69 03 56 46 03 
00 8F C2 D0 01 56 A4 00 C4 C4 03 56 45 03 42 07 A9 8A A6 06 D4 0F 18 66 
03 56 46 03 00 8F C2 D0 40 8F C1 D0 01 56 A4 00 03 56 46 03 01 56 A5 00 
C5 88 A6 06 C4 07 A6 1E 03 56 45 03 42 07 A9 8A A6 06 D4 0F 31 66 03 56 
46 03 00 8F C2 D0 01 56 A4 00 C4 C4 03 56 45 03 42 07 A9 8A A6 06 D4 0F 
1E 68 03 56 46 03 00 8F C2 D0 40 8F C1 D0 01 56 A4 00 03 56 46 03 01 56 
A5 00 C5 88 A6 06 C4 07 A6 1E 03 56 45 03 42 07 A7 1E 03 56 45 03 42 07 
A9 8A CC 0E A7 8A D4 07 A6 0F 06 67 46 0A 46 92 40 52 E8 FF 47 FF 46 92 
40 52 12 61 03 56 45 03 42 07 A9 8A 03 56 C4 03 00 8F C6 D0 01 56 A4 00 
BF 56 C4 05 03 56 45 08 05 50 EF FF 0E 01 47 92 46 96 48 92 46 54 4E 68 
AC 28 06 00 46 30 00 8F 44 D0 01 56 A4 00 C4 92 12 60 46 30 40 8F 44 D0 
01 29 01 56 A5 00 03 56 45 03 42 07 A9 8A C4 40 03 6C 02 9A 02 6F 01 9A 
C5 96 30 6F 47 30 00 8F 44 D0 01 56 A4 00 C4 92 02 52 08 60 01 29 03 56 
45 03 42 07 A9 8A C4 40 10 6C 47 30 00 8F 44 D0 01 56 A4 00 C4 92 01 52 
19 60 01 29 03 56 45 03 42 07 A9 8A C4 40 12 6C 03 56 45 03 42 07 A9 8A 
03 56 C4 03 00 8F C6 D0 01 56 A4 00 BF 56 C4 02 03 56 45 08 02 50 EF FF 
C0 00 46 0A 48 92 46 54 B6 67 01 29 03 56 45 03 42 07 A7 1E C7 92 46 96 
40 8F C2 D0 03 56 46 03 01 56 A5 00 03 56 45 03 42 07 A9 8A D4 06 C5 1E 
03 56 46 03 00 8F C0 D0 01 56 A4 00 03 56 45 03 42 07 A7 1E C7 92 C4 96 
C0 76 C1 D0 03 56 46 03 01 56 A7 00 03 56 45 03 42 07 A9 8A CC 92 C7 96 
40 8F C4 D0 03 56 46 03 01 56 A5 00 03 56 45 03 42 07 A9 8A E4 06 C5 1E 
00 8F C6 D0 03 56 46 03 01 56 A4 00 C4 2B 00 8F C4 D0 03 56 46 03 01 56 
A4 00 C4 06 1A 61 46 40 0D 6C 46 92 01 3B C0 FF 1F 76 40 03 A9 2D 01 9A 
66 FF A9 85 0C 98 0D 99 0C 6F 46 92 01 3B C0 FF 1F 76 40 03 A9 2D 01 9A 
66 FF A9 85 0A 98 0B 99 46 92 08 52 13 67 46 40 11 6C 01 29 03 56 45 03 
42 07 A9 8A E4 06 0A 60 03 56 46 03 00 8F C4 D0 01 56 A4 00 48 8F 83 96 
C4 A0 01 29 00 8F C6 D0 03 56 46 03 01 56 A4 00 C4 92 1A 60 46 40 0D 6D 
46 92 01 3B C0 FF 1F 76 40 03 A9 2D 01 9A 66 FF A9 85 02 98 03 99 0C 6F 
46 92 01 3B C0 FF 1F 76 40 03 A9 2D 01 9A 66 FF A9 85 04 98 05 99 45 0A 
43 92 45 54 E6 FF 70 FD 45 2B BF 56 46 01 45 92 10 52 19 67 AC 28 06 00 
45 30 00 8F 44 D0 01 56 A4 00 C4 92 02 52 08 60 22 76 46 0E 1F 76 D1 17 
04 98 05 99 1A 76 03 56 46 01 45 0A 46 96 45 92 10 52 EB 68 00 9A 88 FE 
69 FF 06 00 02 FE BF 56 41 01 22 76 1F 76 40 03 04 40 10 6C 01 29 00 8F 
C4 D0 03 56 41 03 01 56 A4 00 1F 76 38 00 C4 06 08 1E 1F 76 33 00 22 1A 
00 10 41 08 02 00 1F 76 40 03 04 41 10 6C 01 29 00 8F C4 D0 03 56 41 03 
01 56 A4 00 1F 76 38 00 C4 06 0A 1E 1F 76 33 00 22 1A 00 20 41 08 02 00 
1F 76 40 03 04 42 10 6C 01 29 00 8F C4 D0 03 56 41 03 01 56 A4 00 1F 76 
38 00 C4 06 0C 1E 1F 76 33 00 22 1A 00 40 41 08 02 00 1F 76 40 03 04 43 
10 6C 01 29 00 8F C4 D0 03 56 41 03 01 56 A4 00 1F 76 38 00 C4 06 0E 1E 
1F 76 33 00 22 1A 00 80 1A 76 1F 76 40 03 04 06 00 9B 0F 90 58 FF 03 61 
23 76 01 00 82 FE 69 FF 06 00 02 FE 1F 76 40 03 01 92 46 61 41 2B BF 56 
42 01 41 92 40 52 40 67 08 52 19 68 1F 76 00 14 02 06 42 89 14 61 1F 76 
40 03 0C 06 04 CE 05 CF 42 89 2A 61 41 92 01 29 00 8F C4 D0 01 9C 03 56 
A9 03 01 56 A4 00 C4 C5 67 3E 1E 6F 1F 76 00 14 08 06 42 89 19 60 1F 76 
40 03 06 06 42 89 14 61 42 92 5E FF A9 0E 06 C0 07 C1 0A 06 02 CE 03 CF 
42 89 0A 61 01 29 00 8F C4 D0 03 56 41 03 01 56 A4 00 C4 C5 67 3E 03 56 
42 01 41 08 02 00 42 96 41 92 40 52 C2 68 82 FE 06 00 08 FE 46 97 45 96 
42 A8 48 76 22 90 48 96 1F 76 40 03 10 8A C4 92 03 52 05 61 BF 56 01 01 
0A 9A 7D 6F 48 92 6C 60 12 06 44 1E 47 2B 47 92 04 52 0A 67 47 5C A9 A8 
44 07 A9 8A E4 2B 47 0A 47 92 04 52 F8 68 47 2B 47 92 40 52 3C 67 01 29 
04 02 00 8F C0 D0 44 07 A9 83 03 56 47 03 01 56 A4 00 C4 92 C5 72 04 02 
00 8F C2 D0 44 07 A9 83 03 56 47 03 01 56 A4 00 C4 92 00 8F C2 D0 CD 94 
A9 88 03 56 47 03 01 56 A4 00 C4 06 A6 95 CD 97 04 02 00 8F C1 D0 44 07 
A9 83 03 56 47 03 01 56 A4 00 C4 92 D5 72 04 02 00 8F C6 D0 44 07 A9 83 
03 56 47 03 01 56 A4 00 C4 92 DD 72 47 0A 47 92 40 52 C7 68 1F 76 40 03 
12 8A BF 56 C4 01 10 8A DC 92 12 8A 01 9C CC 96 10 8A 12 83 DC 0E CD 88 
A6 0F FB 60 D4 92 05 60 BF 56 01 01 00 9A 17 6F D4 92 02 52 03 60 09 9A 
12 6F 08 9A 10 6F 12 8A BF 56 C4 02 10 8A DC 92 12 8A 01 9C CC 96 10 8A 
12 83 DC 0E CD 88 A6 0F FB 60 48 92 88 FE 06 00 04 FE 43 96 42 A8 00 9B 
48 76 02 94 84 FE 06 00 06 FE 45 96 44 A8 00 D4 48 76 52 95 A9 28 FE 03 
00 D4 00 D5 00 9B 41 2B 48 76 5A 95 01 9B 45 92 44 8A 48 76 02 94 46 96 
41 2B 00 D5 01 9B A9 28 FE 03 46 5C 48 76 5A 95 46 92 86 FE 06 00 06 FE 
45 96 42 A8 40 52 0A 67 01 29 00 8F C6 D0 03 56 45 03 01 56 A4 00 C4 92 
03 61 01 9A 39 6F 42 C4 03 56 45 03 00 8F C4 D0 01 56 A4 00 C4 C2 45 40 
04 6C 00 8F 0C D0 03 6F 00 8F 0A D0 44 A8 42 06 0B 61 45 92 01 3B C0 FF 
A9 2D 01 9A 66 FF A9 85 C4 98 CC 99 0B 6F 45 92 C0 FF 01 3B A9 2D 01 9A 
66 FF 5E FF A9 85 C4 C0 CC C1 45 92 08 52 0F 67 45 40 0D 6C 42 06 0B 60 
01 29 00 8F C4 D0 03 56 45 03 01 56 A4 00 48 8F 83 96 C4 A0 00 9A 86 FE 
06 00 02 FE 41 96 40 52 03 68 00 D4 08 6F 01 29 03 56 41 03 00 8F C0 D0 
01 56 A4 00 82 FE 06 00 02 FE 42 1E 1F 76 00 14 04 1E 1F 76 40 03 06 98 
07 99 82 FE 06 00 02 FE 42 1E 1F 76 00 14 02 CE 03 CF 58 FF 03 61 01 9A 
02 6F 00 9A 82 FE 06 00 02 FE 42 1E 1F 76 00 14 00 1E 1F 76 33 00 BF 56 
21 01 82 FE 06 00 02 FE 42 1E 1F 76 00 14 08 CE 09 CF 58 FF 03 61 00 9A 
02 6F 01 9A 82 FE 06 00 02 FE 42 1E 1F 76 00 14 06 1E 1F 76 40 03 55 FF 
06 C0 07 C1 82 FE 06 00 1F 76 40 03 0E 8A C4 92 06 00 02 FE 42 A8 42 06 
1F 76 40 03 08 1E 82 FE 06 00 06 FE 45 7D 44 7C 43 97 42 96 1F 76 40 03 
08 06 09 61 49 92 41 96 08 C5 43 93 44 5C 45 5D 42 92 67 3E 86 FE 06 00 
AD 28 00 C0 69 FF 1F 56 16 56 1A 56 10 E6 00 02 40 29 1F 76 00 00 02 29 
1B 76 48 76 99 96 00 52 42 61 22 76 A9 28 08 97 A8 28 08 00 01 09 1B 61 
C8 76 08 97 04 29 0F 6F 00 9B A9 24 01 DF 04 6C 04 29 A8 24 01 DF A6 1E 
A1 F7 86 24 A7 06 A1 81 01 09 A7 1E A9 24 03 63 5C FF 04 3B A9 59 01 DF 
09 00 EC FF A9 28 FF FF A8 28 FF FF 01 09 05 61 3F 8F FF FF 48 76 29 96 
1A 76 48 76 9B 96 A9 28 FF FF A8 28 FF FF 01 09 0E 61 FF 76 FF FF 06 6F 
01 DF BD C3 A7 1E 67 3E BE C5 A9 24 01 DF A8 24 58 FF F7 60 48 76 6A 96 
48 76 02 96 04 FE 42 A8 01 02 48 76 1C 95 43 96 14 9A 08 8F E0 95 48 76 
44 00 1F 76 80 C0 01 96 00 52 03 61 01 9A 0A 6F 05 9A 48 76 A8 00 1F 76 
80 C0 00 2B 48 76 7C 00 00 9A 84 FE 06 00 02 FE 42 A8 48 76 7C 00 1F 76 
80 C0 00 92 15 61 1F 76 80 C0 01 2B 0A 6F 1F 76 80 C0 10 92 48 76 A8 00 
08 6F BF 56 01 01 05 6F C7 FF 01 52 F5 61 FA 6F 1F 76 80 C0 00 2B 00 9A 
82 FE 06 00 06 00 00 77 00 6F BD B2 1F 76 4B 03 A9 59 00 92 0D 61 AB 28 
FF FF AA 28 FF FF A9 28 FF FF A8 28 FF FF AB 0F 03 61 7F 76 FF FF 1F 76 
4B 03 06 C5 67 3E 1F 76 4B 03 04 06 04 61 A7 1E A1 92 67 3E 1F 76 4B 03 
02 06 03 61 A7 1E 67 3E 48 76 00 96 BE 8B 06 00 BD B2 BD AA BD A2 08 FE 
A4 82 00 D1 CB 5A 15 6F AD 5C 01 29 03 56 A1 03 A3 07 88 DC 02 09 A4 5C 
A9 83 08 02 48 76 4D 96 42 06 06 61 44 8A 46 83 48 76 4D 96 CB 5A 01 D9 
A2 92 A1 54 EA 66 88 FE BE 82 BE 86 BE 8B 06 00 00 52 AB A8 A4 C5 07 61 
A9 88 81 DE 85 5C 87 7C 0E 00 FE FF A9 88 A6 0F 0F 61 00 53 0D 61 FF 9D 
A8 5C BF 76 FE FF 85 92 87 96 0E 00 FE FF 85 92 87 96 0C 00 F8 FF A4 A9 
06 00 AB 28 FF FF AA 28 FF FF A9 28 FF FF A8 28 FF FF AB 0F 04 60 00 BE 
00 D4 09 6F AB 28 FF FF AA 28 FF FF A4 A9 C4 88 02 09 A9 8A A6 92 48 76 
FF 95 06 00 1B 76 F0 FF 00 E2 BD 00 30 E6 00 06 42 29 16 56 80 E2 BE 00 
F1 FF 17 76 02 76 1F 76 4B 03 08 A8 06 00 1F 76 4B 03 06 A8 06 00 06 00 
01 9A 06 00 06 00 00 C0 00 00 FF CF 00 00 00 00 00 00 00 D0 00 00 FF DF 
00 00 00 00 00 00 00 E0 00 00 FF EF 00 00 00 00 00 00 00 F0 00 00 FF FF 
00 00 00 00 00 00 00 00 01 00 FF 0F 01 00 00 00 00 00 00 10 01 00 FF 1F 
01 00 00 00 00 00 00 20 01 00 FF 2F 01 00 00 00 00 00 00 30 01 00 FF 3F 
01 00 00 00 00 00 00 40 01 00 FF 4F 01 00 00 00 00 00 00 50 01 00 FF 5F 
01 00 00 00 00 00 00 60 01 00 FF 6F 01 00 00 00 00 00 00 70 01 00 FF 7F 
01 00 00 00 00 00 00 80 01 00 FF 8F 01 00 00 00 00 00 00 90 01 00 FF 9F 
01 00 00 00 00 00 00 A0 01 00 FF AF 01 00 00 00 00 00 00 B0 01 00 FF BF 
01 00 00 00 00 00 00 F8 03 00 F6 FB 03 00 02 00 00 00 00 FC 03 00 F7 FF 
03 00 01 00 00 00 
2E 00 08 00 08 97 FF FF 01 D0 00 00 00 00 FE FF 0E D0 00 00 F7 FB 03 00 
FE FF 10 D0 00 00 F8 FB 03 00 FE FF 12 D0 00 00 F8 FF 03 00 FF FF C0 D2 
00 00 01 00 FE FF C2 D2 00 00 00 00 00 00 FE FF C4 D2 00 00 00 00 00 00 
FE FF C6 D2 00 00 98 96 08 00 FE FF C8 D2 00 00 98 96 08 00 00 00 00 00 
00 00 
04 00 08 00 5C 81 C3 95 08 00 08 97 08 00 
0C 00 08 00 50 81 01 00 00 00 02 00 00 00 00 03 80 00 10 81 08 00 00 60 
22 00 00 20 30 00 
10 01 08 00 00 80 01 C1 00 01 10 80 08 00 10 80 08 00 A0 48 B2 04 54 C5 
00 00 00 00 0C 76 00 00 00 00 00 00 00 00 02 E0 08 07 00 90 08 00 00 90 
08 00 6D 62 1F 28 09 AA 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 E0 
2E 00 08 97 08 00 08 97 08 00 EE DA 41 A8 01 90 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 06 E0 04 00 5C 81 08 00 5C 81 08 00 CB 2C 11 00 AE 6D 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 04 E0 0C 00 50 81 08 00 50 81 
08 00 13 04 DB 00 FB 61 00 00 00 00 00 00 00 00 00 00 00 00 00 00 07 E0 
40 00 10 81 08 00 10 81 08 00 3A 6C 4B 2A 7B 3C 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 03 80 14 00 00 20 30 00 00 20 30 00 FF FE 00 00 5A 8D 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 82 00 00 00 00 12 00 00 00 
12 00 00 00 00 00 FF FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 05 E0 
00 00 00 80 08 00 00 80 08 00 00 00 00 00 FF FF 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 03 84 00 00 00 00 12 00 00 00 12 00 00 00 00 00 FF FF 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 20 30 00 00 20 
30 00 00 00 00 00 FF FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF FF 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 
00 00


  • 0 in reply to Mike Banducci86
    TI__Guru* 87145 points
    Mike,

    I asked our serial Flash kernel expert to take a look at this.
    Please expect a reply in a day or two.

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    TI__Mastermind 32995 points
    Hi Mike,

    The I believe every CCS project will have an entry point. The entry point in the hex file is used by the kernel. After programming or verifying the flash, the kernel will use the entry point which was in the hex file and sent as part of the header information, to branch to that entry point location after completion.

    It may be possible that you are getting the verify error because the first header information is not being sent and received properly.

    Please see the Shared_Verify.c file. See below:
    //
    // If the KeyValue was invalid, abort the load
    // and return the flash entry point.
    //
    if(SCIA_GetWordData() != 0x08AA)
    {
    statusCode.status = VERIFY_ERROR;
    statusCode.address = FLASH_ENTRY_POINT;
    }

    It appears that the rest of the hex file is being sent properly since you have not seen any checksum errors coming back to the host.

    Therefore, I think that this first information isn't sent properly but the rest of the verification is actually occurring.

    You can test this. Change the code above to something like this:
    if(SCIA_GetWordData() != 0x08AA)
    {
    statusCode.status = VERIFY_ERROR;
    statusCode.address = 0xDEADBEEF;
    }

    If the error address is 0xDEADBEEF, then you know this is your error.

    sal
  • 0 in reply to Sal Pezzino
    Prodigy 170 points
    Thank you so much! This gave me the tip to look in the right place.

    The issue is Unix vs. Windows line endings! The TI serial flash programmer assumed Windows line endings (CR LF) and would consume 3 chars (see the getchar calls in loadProgram_checksum()). With Unix line endings (LF), this would eat the first A of the key value (result: 0x080A) causing the verification error to appear.

    I compounded the error by using Python to generate test files on a Windows machine, which automatically defaults to native line endings, so all of my test files worked perfectly!

    I changed the code to look like this instead:
    unsigned char c;
    while('\n' != c)
    {
    c = getc(pFile); //Skip the STX character and LF/CR that may/may not be preset at the start of the file
    }

    Thank you so much for all the help, I genuinely appreciate the effort you both put in to helping me solve this issue.