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TMS320F28379D: SCI TX / RS-485 Transceiver

John Churchill
Intellectual 260 points
Part Number: TMS320F28379D

I am configuring a RS485 two wire multidrop interface using the SCI port. My issue is control of the transceiver. There are no lines from the SCI to control the transceiver so I am wondering how other people solve this issue.

Currently I am using a GPIO to control the transceiver, but it is the disable of the transceiver that is the issue. When using the FIFO, the interrupt is based on the FIFO empty, but there is still a character being clocked out. So you cannot disable the transmitter in the FIFO interrupt when there are no more characters in the FIFO or to be transmitted, but there is still one character to go. The only way to know that the last character has been transmitted is to check SCICTL2.bit.TXEMPTY and I do not see anyway that I can redirect this to a GPIO pin. Obviously this has been solved before, but I cannot find it in the threads.

Thanks John

  • 0
    TI__Genius 10015 points
    hi ,

    Can you check if these designs are useful to get the setup / connections in place?

    www.ti.com/.../TIDA-01281

    www.ti.com/.../TIDA-01629

    Once the ISR is complete we can check for these bits SCICTL2.bit.TXEMPTY or SCICTL2.bit.TXRDY in a while loop.
    This will show that all the content is gone ...also maybe use a flag in the ISR .

    Regards.
  • 0 in reply to MEGHANA MANAVAZHI
    Intellectual 260 points

    Hi,

    Thanks for the quick reply. I agree with your solution, however that means that at 38400 baud, you would wait for the last character to clock out in a spin loop. At the 38.4K that 260us, which is a lot of time to burn in a spin loop in the interrupt. The only solution I can see is to use a ePWM channel as a one shot to control the transmitter enable of the 422/485 driver, which is what I am working on. I was hoping that someone had a better solution since this is a very common issue.

    Thanks,

    John

  • 0 in reply to John Churchill
    TI__Genius 10015 points
    hi John ,

    Can we not have this check outside the interrupt in the main application ?
    Does this time burn play a major issue then ?

    The issue here is a way to know if the SCI transmission is complete right ?
    We could check flags and a timeout ( max needed to transmit a single data) whichever earlier and break from the control accordingly.

    Regards.
  • 0 in reply to MEGHANA MANAVAZHI
    Intellectual 260 points

    Hi Meghana,

    Yes, the last thing you want to do is sit in a spin loop for a character time period in an interrupt. And having code somewhere else to reset the transmitter would require a rapid testing rate, which again is a waste of resources. On most UART's I have ever used actual empty flags are available for an output or interrupt so that this can be used to disable the transmitter on a multi-drop communications scheme.

    I have solved this issue but using a ePWM channel as a one shot. I trigger it ON, but counter suspended when I start writing data to the FIFO and start it running with a CLEAR set when I get a FIFO empty interrupt and have no more characters to write. I set the time for one character width and this does solve the problem. I suggest that you use this as the correct way to resolve this instead or spin loops and other ways that you suggested.

    Thanks,

    John

  • 0 in reply to John Churchill
    TI__Genius 10015 points
    hi John ,

    Good to hear that you found a solution.

    Is this any different from using a timeout (max needed to transmit a single data) after the FIFO empty interrupt is triggered and breaking from the control accordingly ?

    How does using a one shot mode help here if its just needed to use a counter and provide a disable on the transmit GPIO ??

    Regards.
  • 0 in reply to MEGHANA MANAVAZHI
    Intellectual 260 points

    Hi Meghana,

    Sorry for the delay! I'm not sure by what you mean as a timer, but the nice part of this solution is that the ePWM then controls the transmit line for the entire process. When I write characters into the FIFO I clear the ePWM counter and have it set the output (transmit) on. When I get the FIFO empty interrupt I enable the ePWM to clear the output. I can program the ePWM to use the correct counts for the last character and then it will disable the transmit line without any further interrupts or processor involvement. This may have been your thinking also.

    Thanks,

    John