Hi,
I have 2 questions regarding the on-chip ADC.
Q1: Datasheet, Table 5-45 shows the parasitic capacitance of each ADC input. I'd like to ask if we have any tolerance for these typical values. Can I use +/-20% for the worst case analysis?
Q2: How can I calculate the total conversion errors? Is this the Total Unadjusted Error (TUE) in this documentation?