This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/TMS320F28335: tms320f28335

Part Number: TMS320F28335

Tool/software: Code Composer Studio

Greetings,

My project uses TMS320F28335 for reading ADC from ADCAIN0 to ADCBIN7 and from the control suit project named Example_2833xAdcSoc I managed get all these ADC's working with following modification 


//AdcRegs.ADCTRL1.bit.CONT_RUN = 1;
AdcRegs.ADCMAXCONV.all = 0x0ff; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup ADCINA3 as 1st SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2; // Setup ADCINA1 as 3rd SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3; // Setup ADCINA4 as 4th SEQ1 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x4; // Setup ADCINA0 as 5th SEQ2 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x5; // Setup ADCINA5 as 6th SEQ2 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x6; // Setup ADCINA6 as 6th SEQ2 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x7; // Setup ADCINA7 as 7th SEQ2 conv.
AdcRegs.ADCCHSELSEQ3.bit.CONV08 = 0x8; // Setup ADCINB0 as 8th SEQ2 conv.
AdcRegs.ADCCHSELSEQ3.bit.CONV09 = 0x9;
AdcRegs.ADCCHSELSEQ3.bit.CONV10 = 0xA;
AdcRegs.ADCCHSELSEQ3.bit.CONV11 = 0xB;
AdcRegs.ADCCHSELSEQ4.bit.CONV12 = 0xC;
AdcRegs.ADCCHSELSEQ4.bit.CONV13 = 0xD;
AdcRegs.ADCCHSELSEQ4.bit.CONV14 = 0xE;
AdcRegs.ADCCHSELSEQ4.bit.CONV15 = 0xF;

AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
AdcRegs.ADCTRL2.bit.EPWM_SOCB_SEQ2 = 1;// Enable SOCB from ePWM to start SEQ2
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ2 = 1; // Enable SEQ2 interrupt (every EOS)

// Assumes ePWM1 clock is already enabled in InitSysCtrl();
EPwm2Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm2Regs.ETSEL.bit.SOCASEL = 1;//4; // Select SOC from from CPMA on upcount
EPwm2Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event

//SOCB
EPwm2Regs.ETSEL.bit.SOCBEN = 1; // Enable SOC on B group
EPwm2Regs.ETSEL.bit.SOCBSEL = 1;//4; // Select SOC from from CPMB on upcount
EPwm2Regs.ETPS.bit.SOCBPRD = 1; // Generate pulse on 1st event

EPwm2Regs.CMPA.half.CMPA = 0x0080; // Set compare A value
EPwm2Regs.TBPRD = 0xFFFF; // Set period for ePWM1
EPwm2Regs.TBCTL.bit.CTRMODE = 0; // count up and start

interrupt void adc_isr(void)
{

Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;
Voltage3[ConversionCount] = AdcRegs.ADCRESULT2 >>4;
Voltage4[ConversionCount] = AdcRegs.ADCRESULT3 >>4;
Voltage5[ConversionCount] = AdcRegs.ADCRESULT4 >>4;
Voltage6[ConversionCount] = AdcRegs.ADCRESULT5 >>4;
Voltage7[ConversionCount] = AdcRegs.ADCRESULT6 >>4;
Voltage8[ConversionCount] = AdcRegs.ADCRESULT7 >>4;
Voltage9[ConversionCount] = AdcRegs.ADCRESULT8 >>4;
Voltage10[ConversionCount] = AdcRegs.ADCRESULT9 >>4;
Voltage11[ConversionCount] = AdcRegs.ADCRESULT10 >>4;
Voltage12[ConversionCount] = AdcRegs.ADCRESULT11 >>4;
Voltage13[ConversionCount] = AdcRegs.ADCRESULT12 >>4;
Voltage14[ConversionCount] = AdcRegs.ADCRESULT13 >>4;
Voltage15[ConversionCount] = AdcRegs.ADCRESULT14 >>4;
Voltage16[ConversionCount] = AdcRegs.ADCRESULT15 >>4;


// If 40 conversions have been logged, start over
if(ConversionCount == 16)
{
ConversionCount = 0;
}
else ConversionCount++;

Although this resulted in reading data from every ADC channels a particular ADC with ADCRESULT5 seems to be reading completely random data and varying range of  0 to 1V without any fluctuation in its input. Input provided is constant 2V although ADCRESULT5 gives the similar range sometimes but still the variation exists. Along with this when provided consistent voltage across every terminal of ADC there seems to be a sudden drop in voltage reading say 2.5V is provided as a n input the readout gives you around 2.4V on a normal basis and then all of sudden it reads out 0.368V and then comes back to reading 2.4V is there any explanation for this. The board used in custom and voltage source provided across the terminal are from precision voltage source and I have cross verified for any noise present in the signal it appears to be normal.

1.Is this configuration issue ?

2.What are my options to fine tune the ADC readout without spikes or drops which Im witnessing?

3.How to make the ADC readout precise for nearly 0.01 V?

I have been stuck with this bug for pretty long time now can anyone help me?

  • Hithesh,

    Are you converting a single source that is shared across all ADC channels? What are the characteristics of the source voltage? Are you able to scope the ADC pin during conversions to see if there are any voltage disturbances in the microsecond time scale?

    If the signal path has low bandwidth, you may need to increase the ACQ_PS settings for the conversions to allow for a longer settling time.

    I recommend debugging a single channel first. Try changing all of the CHSEL settings to one channel and record the series of conversions.

    -Tommy


  • Thanks for the reply.
    1.Are you converting a single source that is shared across all ADC channels?
    A- Yes, On testing I am converting a single source connected to all ADC channels however the impled uses to get it done with different sources across different channels. All of the pins from ADCRESULT0 to ADCRESULT15 are mapped with ADCINA0 to ADCINB7 respectively when connected to a single source every channel out varies from 0.1 V to 0.2V except for ADCRESULT5 or ADCIN5 which varies around 0.6 to 1.0 V .

    2.What are the characteristics of the source voltage?
    A- A standard DC POWER SUPPLY which is cross checked with cro to have extremely low noise.

    3. Are you able to scope the ADC pin during conversions to see if there are any voltage disturbances in the microsecond time scale?
    A- No, there seems to be little or no noise at the time of conversion at the pin.

    4.If the signal path has low bandwidth, you may need to increase the ACQ_PS settings for the conversions to allow for a longer settling time.
    A- I dont know how to set this but if its for giving little more time for conversion of a specific ADC pin then I cant explain why every other pin works and this doesnt when connected across a common source?

    5.I recommend debugging a single channel first.
    A- I did this and the result seems to be same. I set the
    AdcRegs.ADCMAXCONV.all = 0x000;
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x5;
    Result seems to be same( 0.6 to 1.0 V on conversion from hex values) at ADCRESULT0 address.

    6.Try changing all of the CHSEL settings to one channel and record the series of conversions.
    A- I did this and the result seems to be same. I set of values obtained are erratically varying.
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x5; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x5; // Setup ADCINA2 as 2nd SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x5; // Setup ADCINA1 as 3rd SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x5; // Setup ADCINA4 as 4th SEQ1 conv.
    AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x5; // Setup ADCINA0 as 5th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x5; // Setup ADCINA5 as 6th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x5; // Setup ADCINA6 as 6th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x5; // Setup ADCINA7 as 7th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ3.bit.CONV08 = 0x5; // Setup ADCINB0 as 8th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ3.bit.CONV09 = 0x5;
    AdcRegs.ADCCHSELSEQ3.bit.CONV10 = 0x5;
    AdcRegs.ADCCHSELSEQ3.bit.CONV11 = 0x5;
    AdcRegs.ADCCHSELSEQ4.bit.CONV12 = 0x5;
    AdcRegs.ADCCHSELSEQ4.bit.CONV13 = 0x5;
    AdcRegs.ADCCHSELSEQ4.bit.CONV14 = 0x5;
    AdcRegs.ADCCHSELSEQ4.bit.CONV15 = 0x5;

    Result seems to be same( 0.6 to 1.0 V on conversion from hex values) at ADCRESULT0 to ADCRESULT15 address.
    Is there any particular reason for this behavior?I would appreciate every help possible to solve this issue. Thank you.
  • Hithesh Karanth said:
    1.Are you converting a single source that is shared across all ADC channels?
    A- Yes, On testing I am converting a single source connected to all ADC channels however the impled uses to get it done with different sources across different channels. All of the pins from ADCRESULT0 to ADCRESULT15 are mapped with ADCINA0 to ADCINB7 respectively when connected to a single source every channel out varies from 0.1 V to 0.2V except for ADCRESULT5 or ADCIN5 which varies around 0.6 to 1.0 V .

    Do you have any signal conditioning circuitry such as RC filters on your board?  Are there any capacitors near the ADC channels to help with charge sharing?

    Hithesh Karanth said:
    4.If the signal path has low bandwidth, you may need to increase the ACQ_PS settings for the conversions to allow for a longer settling time.
    A- I dont know how to set this but if its for giving little more time for conversion of a specific ADC pin then I cant explain why every other pin works and this doesnt when connected across a common source?

    The ACQ_PS is configured through the ADCTRL1 register as described in the F2833x ADC Reference Guide. The ADC core is the same for all channels so if there is significant difference in performance between channels, it is most likely due to board-level issues.

    Hithesh Karanth said:
    6.Try changing all of the CHSEL settings to one channel and record the series of conversions.
    A- I did this and the result seems to be same. I set of values obtained are erratically varying.

    Can you share the values from the conversion series as well as the expected value? It may also be beneficial to check for assembly issues that may result in poor electrical contact on channel A5.

  • tlee (43905)

    Once again thank you for replying.

    1.Yes individual pins of ADC are connected across op-amp as shown in the circuit below output of this circuit goes to ADC (-10V) to 10V converst to 0-3V and I have checked the output condition of the this circuit across every pins of ADC and there seems to be little noise of around 20 mV or so apart from that everything seems to be working fine across every ADC pins. D_ADCA0 is connected to ADCINA0 similar arrange ment has been made across Each ADC.

    6. Sure the following parameters are considered for getting the output as shown in the screen shot.

    Voltage provide at CN2_A0 , CN2_A4 and CN2_A5 which is connected across pins ADCINA0 , ADCINA4 and ADCINA5 respectively and sequencer set as shown below 

    AdcRegs.ADCMAXCONV.all = 0x0ff; // Setup 2 conv's on SEQ1
    AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup ADCINA3 as 1st SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x4; // Setup ADCINA2 as 2nd SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x5; // Setup ADCINA1 as 3rd SEQ1 conv.
    AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x5; // Setup ADCINA4 as 4th SEQ1 conv.
    AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x5; // Setup ADCINA0 as 5th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x5; // Setup ADCINA5 as 6th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x5; // Setup ADCINA6 as 6th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x5; // Setup ADCINA7 as 7th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ3.bit.CONV08 = 0x5; // Setup ADCINB0 as 8th SEQ2 conv.
    AdcRegs.ADCCHSELSEQ3.bit.CONV09 = 0x5;
    AdcRegs.ADCCHSELSEQ3.bit.CONV10 = 0x5;
    AdcRegs.ADCCHSELSEQ3.bit.CONV11 = 0x5;
    AdcRegs.ADCCHSELSEQ4.bit.CONV12 = 0x5;
    AdcRegs.ADCCHSELSEQ4.bit.CONV13 = 0x5;
    AdcRegs.ADCCHSELSEQ4.bit.CONV14 = 0x5;
    AdcRegs.ADCCHSELSEQ4.bit.CONV15 = 0x5;

    gives me the following output:

    4. Having said that do I need to set the ACQ_PS to observe changes as we can see from the above screen shot the ADCINA0 and ADCINA4 is giving the required output when given voltage source however the ADCINA5 varies erratically. There seems to be negligible amount of noise across ADCINA0 , ADCINA4 and ADCINA5.

     

  • Hithesh,

    Yes, please do try to vary the ACQ_PS setting to see if there is any change in behavior.

    The buffer circuitry looks like it should work well.  20mV noise would show up as about 28 LSBs of noise.

    When you are measuring the noise, are you looking at the A33 testpoint or at the device pin?  The signal can look different between the two points.  Can you check for faulty components or sources of noise coupling on the D_ADCA5 side?

    Am I correct in understanding that the other channels are performing within expectations?  If so, we can assume that the ADC support circuitry (power, references, Rext, etc) are ok for now.

    -Tommy

  • Hithesh,

    It has been a while since your last update. I assume that you were able to resolve your issue.

    If not, please reply to this thread. If the thread has locked due to timeout, please create a new thread describing the current status of your issue.

    -Tommy