TMS320F240: Algorithms for resolver speed and position

Dear Gary,

thank you for your interest in the application report, Please find below my feedback to your questions.

I'd highly recommend you check out or our latest TMS320F28x based resolver to digital kit and related software and white paper: http://www.ti.com/tool/tmdsrslv

1. If I eliminate FIR filter in the design, would it effect the resolution?

[Martin]  If you eliminate the FIR pass filter and the integral invariant IIR the angle resolution w/o any oversampling will be equivalent to the ADC resolution + 1-bit.
So for the old TMS320F240, which only had 10-bit ADC, the angle resolution would be 11-bit. This is not equivalent to accuracy, of course.
Especially removing the FIR bandpass filter has an impact of offset and noise above the resolver excitation frequency, see  filter magnitude response on figure 12.  

2. Is the design a lead compensator? What is the difference between the proposed design and ATO.

[Martin] The proposed  lead compensator is patented for TI and exactly compensates the FIR filter propagation delay. so we don't have any velocity lag,

This method works very well with our 2000 MCUs due to  their simultaneous sampling 12-bit or now even 16-bit dual sampling ADC as well as accelerators for trigonometric math. The advantage with the dual ADC and oversampling is that you can use the same MCU for control and resolver. Another advantage is that the filter can be changed quickly or even run in parallel (thanks to C2000 math accelerators)  to have a lowest latency response for high-speed and a precision angle for lower speed. 

The ATO (analog tracking loop) is a different method to demodulate and decode the resolver angle using a dual DAC feedback.This method is used in our  single-chip resolver to digital converters PGA411-Q1. To see test results w/ PGA411-Q1;please see www.ti.com/tool/TIDA-00363.

3. How to set the coefficients of the compensators to adjust bandwidth, tracking rate , resolution and acceleration constant?

[Martin] I used MATLAB and TMS320 ASPI Digital Filter Design Package for PC to calculate and evaluate the filter coefficients. 

Regards, 

Martin

 

Hello Gary,

yes, the total latency will include the ADC conversion time and and - if you have an external ADC - it includes the latency of the ADC interface too. This latency is of course depending on your external ADC interface, e.g. assuming an ADC with 4 MHz SPI interface the additional latency for a 16-bit transfer is around 4 us.

To your questions:

a) I don't have the formula anymore to calculate. I'd like you to refer to Mathworks on how to calculate filter parameters Matlab.

b) The 32-bit floating point math should not affect accuracy vs. a fixed point (fractional) implementation assuming it's programmed correctly.
The advantage of the C2000 MCU like the F28377D is that you can actually easily test and compare yourself using the C2000 IQMath library. It allows you to switch with a simple type define between fractional using the 32-bit integer unit or the 32-bit floating point. For info on that see C2000 product page or E2E forum.

A digital real-time controller like the F28377D with integrated high-speed ADC (even 16-bit!) and trigonometric math accelerator allows you to sample the resolver sin/cos at it's peak amplitude and calculate the arc tangent together in less than 1us. In the background you can calculate the offset using a moving average filter.
I'd highly recommend you try out C2000 real-time MCU.

Thanks. 

Regards,

Martin Staebler

Hello Gary,

please find my feedback below.

on 1: We let you decide: We either offer a single-chip resolver to digital converter PGA411-Q1 which has a hardware implemented ATO, or the C2000 as alternate for custom specific implementations of resolver to digital converter. We have shown the arc tangent method with the C2000, which as I indicated, can achieve low latency too. When the exciter is external, of course the frequency need to be measured to allow a synchronous demodulation. This might be done by e.g. the C2000 capture unit to measure zero crossings using a comparator to digitize the exciter signal.

on 2: The two application notes you refer to seem not from TI. I cannot help you there. I'd rather refer to
www.ti.com/.../tmdsrslvr, which as indicated use the arc tangent method.

on 3: I don't know your algorithm, neither your hardware (TI?). Therefore I cannot tell you the root cause of your lag.

Regards,
Martin

Gary,

the filters we used for the resolver to digital conversion like FIR and IIR are standard filters and commercial available filter design tool (I would not like to promote a specific tool) will be able to calculate. The angle resolution depends on the ADC resolution (and the analog front end). Oversampling and post filtering will theoretically increase the resolution by 3 dB (0.5-bit) every time the bandwidth is reduced by 50%. This off course assumes the noise is distributed equally and there are not missing codes with the ADC. 

Regards, Martin

Gary,

the transient angle error during acceleration and deceleration increase with the magnitude of the acceleration/deceleration and tracking loop bandwidth. I don't have the algorithm ready to calculate the filter coefficients versus a given maximum transient phase lag. I'd use a commercial available mathematics simulation program.

Regards, Martin

Gary,
I am closing this thread. If you have new questions, please open a new thread with a relevant title.