CCS/F28M35H52C: Configuration for out-of-lock of the system PLL possible?

LukasWuethrich

Part Number: F28M35H52C

Tool/software: Code Composer Studio

Hello everybody

Can I configure the frequency range or a tolerance when the PLL locks? Can I control this from the outside or can I only check the status bit?

Thanks
Lukas

over 6 years ago

0 Hareesh Janakiraman over 6 years ago

TI__Guru* 95315 points

No configuration of the PLL parameters is possible while it is locking.

You have to rely on the status bit to determine lock.

0 LukasWuethrich over 6 years ago in reply to Hareesh Janakiraman

Prodigy 50 points

I'm sorry, my question may not have been understandable.

I would like to know when the PLL sets the status "lock". How stable must the frequency be (duration, stability, etc.) for the bit "Locked" to be set? Is there a specification?
And can I change this behaviour (e.g. setting an upper and lower frequency or a deviation of the frequency)?

0 Hareesh Janakiraman over 6 years ago in reply to LukasWuethrich

TI__Guru* 95315 points

How stable must the frequency be (duration, stability, etc.) for the bit "Locked" to be set? Is there a specification?

While we can qualitatively say the bit is set only after the PLL output stabilizes in the new frequency, we do not have a specification.

And can I change this behaviour (e.g. setting an upper and lower frequency or a deviation of the frequency)?

No.

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CCS/F28M35H52C: Configuration for out-of-lock of the system PLL possible?