CCS/TMS320F28069: SGEN function /RELEASE mode/RAM_FLASH

Hello

If it isn't finding the library, make sure in your project settings for the linker that your include paths include where the library is.

Best regards
Chris

Hello , thank you the library is find now .

What is the difference between include patchs and copie files in folder directly . ( because for some others functions the two methods work's)

But what i want to do does work .

I want to copie what i have in flashC in RAML7 for a faster execution .

I try this 

ramfuncs1 :

LOAD = FLASHC,
RUN = RAML7,
LOAD_START(_Ramfuncs1LoadStart),
LOAD_END(_Ramfuncs1LoadEnd),
RUN_START(_Ramfuncs1RunStart),
LOAD_SIZE(_Ramfuncs1LoadSize),
PAGE = 1

{
-lC28x_SGEN_Lib_fpu32.lib<SINTB360.obj>(.text)
}

and i have a warning 10068 -D no matching section , for the line "-lC28x_SGEN_Lib_fpu32.lib<SINTB360.obj>(.text)".

I read others articles related this warning but i don't now how to solve it . This warning say that i have linked the section, but the section is not present in the build...

Thank you .

Hello

Not exactly sure what you're asking. There is separate include paths for the compiler and another for the linker. In this case, you needed to the tell the linker where to look for the library.

Are you using a function from SGEN library? What if you remove the .text?

Best regards
Chris

Hello ,

by removing .text it work's. 

But I don't have the result i expect . So i will ask you a another question.

Firstly, I was in debug mode , i generate 3 sinewave from sgen library .In this mode ,the execution of interrupt take 4.20µs.

Then i pass in release mode , now the interrupt execution takes 5.80 µs (load and run from flash).

So what i try is to load the part of the sgen function in flash , copying in Ram to execute it in Ram.

In release.cmd i had :

Now SINTB360 is copied in RAML 7 , and I think that this function is run from RAML7 . Is that right?

Why the execution time  of the interruption is not the same that in debug mode?(execution time same as in flash 5.80 µs )

How can I be sure that SINTB360 really run in RAM , is there any way to improve  execution time?  

Thank you for your time

Alain.

Hello

Yes, your understanding is correct, it should run from RAML7. You can step through the code and observe that the PC is executing that function from RAM memory addresses.

I'll have an expect get back to you on execution time.

Best regards
Chris

Alain,

1. Why doesn't SINTBL            : >  RAML7,     PAGE = 1 work? This is how the TI SGEN examples are structured, so I would like to investigate this first.

2. If my understanding is correct, you observed that

Debug mode, Load and Run from Flash -> 4.2us

Release mode, Load and Run from Flash -> 5.8us (Why did it increase?! Are there project build settings differences between Debug and Release? e.g. Optimization level)

Release mode, Load from Flash and Run from RAM -> 5.8us (Did you confirm based on Chris's suggestion that the code is indeed executing from RAM?)

3. You posted the following picture of the code snippet.

a. Is there any #ifdef around this code snippet, like #ifdef FLASH? Have you confirmed the condition is TRUE?

b. Are Ramfunc1LoadStart and the other 2 linker symbols extern declared wherever the memcpy is done from Ramfuncs1LoadStart to Ramfuncs1RunStart?

c. Is the memcpy() from Ramfuncs1LoadStart to Ramfuncs1RunStart present, and is it done prior to InitFlash()?

d. What is the reason for including the snippet below?

{

-l C28x_SGEN_lib_fpu32.lib <SINTB360.obj>

}

Thanks,

Sira

Sira , 

1.In release mode  SINTBL          : >  RAML7,     PAGE = 1  doesn't work . It seems that the sgen functions is not loaded in a flash . If i shut down my power supply and show results on an oscilloscope but there is no signal.

2. No in debug mode , Load from flash and Run from RAM-> 4.2us ( because SINTBL is in RAML7 memory allocation)

Release mode, Load and Run from Flash -> 5.8us

Release mode, Load from flash and Run from RAM -> 5.8us   (I copy SINTBL from flashD to RAML7)

(for the moment , i don't check Chris's suggestion i will do)

I don't know why time increases , there is no difference between the to build . (same opt lvl)  

3 . In my code i have : 

extern unsigned int Ramfuncs1LoadStart;
extern unsigned int Ramfuncs1RunStart;
extern unsigned int Ramfuncs1LoadSize;
#define FLASH ;

#ifdef FLASH

memcpy(&Ramfuncs1RunStart, &Ramfuncs1LoadStart,(Uint32) &Ramfuncs1LoadSize);

#endif

And i try more by executing my interruption in RAM with : #pragma CODE_SECTION(cpu_timer0_isr, "ramfuncs1");

c. The line are before initflash() , so it will be prioritised .

d. I add  the snippet  to copy what is in SINTB360 from flash to RAM , I hope have the same execution time that in debug mode but no.

I will check as soon as possible Chris's suggestion and  come back to you .

Hope I answer the required question .

Best regards .

Alain

 

Alain,

Thanks for the answers. Yes please do check Chris's suggestion and let me know if code is indeed being copied from FLASH to RAM.

Meanwhile, I have a few comments and questions:
1. I am not sure whether the snippet of code within {-l C28x_SGEN_lib_fpu32.lib <SINTB360.obj> } is required. I have never seen such a usage. My assumption was that all code that is assigned to the ramfuncs1 section will be loaded to FLASH and run from RAM.
2. Likewise, I don't think there is a need to include LOAD_END. LOAD_START, LOAD_SIZE, and RUN_START should suffice.

3.

Debug mode , Load from flash and Run from RAM-> 4.2us ( because SINTBL is in RAML7 memory allocation)

Release mode, Load and Run from Flash -> 5.8us
[where is SINTBL in this case? RAM or FLASH?]
[presume this means ramfuncs1 loads and runs from FLASH?]

Release mode, Load from flash and Run from RAM -> 5.8us (I copy SINTBL from flashD to RAML7)

Can you try copying SINTBL to a different RAM section than where ramfuncs1 is copied to?

Can you check and let me know what the differences are between your Debug and Release mode project settings?

Thanks,
Sira

Sira , 

The code is copied from FLASH to RAM . But Chris suggests me to look about register Pc , and for that I need some time to understand how that's work's.

1. The snippet {-l C28x_SGEN_lib_fpu32.lib <SINTB360.obj> } is required to copie from FLASH to RAM . I try another way , but it is the only one who work's.

I have seen this usage , for example, if you want to copy a function you can use #pragma or include the snippet {.... .obj} . Maybe it is a wrong use , but I don't find another solution for the moment.

2. Exclude LOAD_END. LOAD_START, LOAD_SIZE induce error , and memcpy need more arguments  than RUN_START .

3. I don't really understand what you mean , ramfunc1 is just a name , the copy is made in RAML7 . I can remove ramfuncs1 and use ramfuncs present in F28069.cmd  where the copy is made in RAML0_4 , but it has no effect .

4 . There is absolutely no difference between my project settings. 

I can say that the difference of the execution time could only be  :

- the time to copy from flash to RAM 

- or that my function is copies in RAM, but executed from FLASH.

I will try to understand more about registration , assembler and try to verify if the function is really executed in RAM .

I will come back to you after verifying Chris suggestion .

Best Regards

Alain.

Alain,

What is puzzling me is that despite no difference between Debug and Release mode, SINTBL can be in RAML7 in Debug mode, but not in Release mode! Perhaps there are some optimization setting differences.

To check Chris's suggestion, you simply need to run your code with a JTAG emulator connected, and step through the code, view the disassembly and see if the instructions are executing from FLASH addresses or RAM addresses (addresses indicated in the Memory map of the datasheet or TRM, or in the .cmd file)

Thanks,
Sira