TMS320F280049: PWM trip taking effect after the dead band module?

Hi experts,

In F280049's block diagram, a trip zone is in the down stream of DB module. But, when I software force a trip event to let A and B of PWM3 to low with below dead band configuration (Marked signal connection in red line). The trip result is that A and B are complementary. I'd like to know if I am do anything wrong. (please see attached code)

BTW, could you help me check these two things. Firstly, If I am doing software trip in a advised way. Secondly, if there is a way to trip both A and B low in my PWM configuration.

Thanks

Dead band configuration:

PWM configuration:

   EALLOW;
   CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0;
   EDIS;

   EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
   EPwm3Regs.TBPRD = PWM3_TIMER_MAX;
   EPwm3Regs.TBPHS.all = 0x00000000;
   EPwm3Regs.CMPA.bit.CMPA = PWM3_TIMER_MAX/2;
   EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;
   EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET;
   EPwm3Regs.AQCTLB.bit.CAU = AQ_SET;
   EPwm3Regs.AQCTLB.bit.ZRO = AQ_CLEAR;

   // Dead band
   EPwm3Regs.DBCTL.bit.IN_MODE = DBA_ALL;
   EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
   EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
   EPwm3Regs.DBRED.all = DEAD_BAND;
   EPwm3Regs.DBFED.all = DEAD_BAND;

   //
   // TBCLK = SYSCLKOUT
   //
   EPwm3Regs.TBCTL.bit.HSPCLKDIV = 1;
   EPwm3Regs.TBCTL.bit.CLKDIV = 0;

   EPwm3TimerDirection = EPWM_TIMER_UP;

   EALLOW;
   CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
   EDIS;

Software force tripping configuration:

      if(i == 1){
          EPwm3Regs.AQSFRC.bit.ACTSFA = 1; // Action When One-Time Software Force A Is Invoked: Clear
          EPwm3Regs.AQSFRC.bit.ACTSFB = 1;
          EPwm3Regs.AQSFRC.bit.OTSFA = 1; // Initiates a single software forced event
          EPwm3Regs.AQSFRC.bit.OTSFB = 1;

          EPwm3Regs.AQCSFRC.bit.CSFA = 1; // Force low on A output
          EPwm3Regs.AQCSFRC.bit.CSFB = 1; // Force low on B output
      }

Sheldon