TMS320F28069F: Dynamic switching of ADC reference

Wolfgang,
Thanks for reaching out to the E2E, and always happy to see an older post referenced!

At any rate, 100us is sufficient since the ADC is already powered at this point and stable. The only wait time we have spec'd in the datasheet when the ADC is first powered up (ADCPWDN/ADCBGPWD/ADCREFPD go from 0 to 1) at 1ms. Since you are only switching the reference source, we just need some time to stabilize the input to the reference buffers.

As you mentioned this is valid for F2802x/F2803x/F2805x/F2806x Piccolo class devices.

You also mentioned there is no effect in your system when you make the switch; please keep in mind that the ADCREFSEL bit in ADCCTL1 is "EALLOW" protected. Meaning that the EALLOW instruction needs to be executed before the core will allow a write to this space. You can verify that the bit is written correctly/incorrectly by reading it back, either in a watch window or in your code. You'll want to write an "EDIS" instruction when you are done to re-enable the blocking.

The reason this register(and many of the configuration registers of all periperhals) has EALLOW protection is to provide another level of protection in case there is unexpected code execution so these registers don't get garbage written to them. Keep in mind this is a global bit, not just local to the ADC registers. I mention this since some users find it simpler to just leave EALLOW set so it doesn't have to be managed, but there is risk.

Finally, if you've taken care of the EALLOW/verified the ADCREFSEL is set and you are still seeing an issue we can debug some more. If you can provide the value(s) you are putting on VREFHI/VREFLO as well as the input voltage you are converting that will help the debug.

Best,
Matthew

Thanks but EALLOW is not the problem. We enable protected register writing before and disable it afterwards. I also made sure the register really changes accordingly using the debugger.

I expect the problem to be related to our fast switching time. The cycle time where all of the measurements need to be made is 83.3us. In this time we are using the external reference for most of the measurements but we also wanted to use the internal reference.

Considering the 100us it seems impossible to use the internal reference for the desired purpose. Is there any way to find a more precise switching time for the reference? We use an external 3.3V reference on VREFHI and GND on VREFLO. The concerned measured voltage is always half of the external reference voltage. The main purpose of using the bandgap reference is to detect drifts of the external reference.

Best regards
Wolfgang

Wolfgang,
Thanks for the detail, and checking EALLOW status.

Keep in mind that the full scale range using the internal reference is also 0-3.3V, so if your VREFHI is also 3.3V the differences ideally will be small to nil.

For the sake of testing(and you may already be doing this); let's put a voltage semi far away from the internal Ref, like 2.5V.

So, when you are on external ref, you should still see ~2048 when you convert the half rail value; and ~1551 using the internal ref. Let's also start at the 100us switching time mentioned above just to confirm.

If this gets the desired results I think we can now look at how much you anticipate your external reference may drift, or another way would be to define what is acceptable amount of drift you can tolerate.

Using this number repeat the same experiment and then start reducing the 100us until you don't see the conversion delta you expect.

I would expect the smaller amount of movement from ideal 3.3V the less settling the switching will take.

Finally we need to keep in mind the tolerance of the internal reference, that error will need to be factored into the above limits, etc.

For a half FCR code the max possible gain error would be halfed as well, while the offset would be constant.

Look forward to your results, I think your approach to test the external reference is a good one, hopefully we can get this time down to be acceptable for your system.

Best,
Matthew

Wolfgang,
Wanted to follow up to see if you had any success with the above method to determine the switching time between references.

Best,
Matthew

Hi,

unfortunately I cannot pursue the topic at this moment because some other stuff came up. 

I hope I will have some spare time for the tests.

Best regards

Wolfgang