CCS/TMS320F28035: Compiler Error

Part Number: TMS320F28035
Other Parts Discussed in Thread: CONTROLSUITE

Tool/software: Code Composer Studio

Hi I'm unsure why or how this happen, but I'm unable to compile the project..no code changes were made

the compiler prints this error:

>> Compilation failure
makefile:378: recipe for target 'Example_28035_Flash.out' failed
"../Cmd_Map_File/28035_RAM_lnk.cmd", line 87: error: RAML0L1 memory range
   overlaps existing memory range RAML0
   RAML0L1    : origin = 0x008000, length = 0x000C00
"../Cmd_Map_File/28035_RAM_lnk.cmd", line 87: error: RAML0L1 memory range
   overlaps existing memory range RAML1
   RAML0L1    : origin = 0x008000, length = 0x000C00
"../Cmd_Map_File/28035_RAM_lnk.cmd", line 88: error: RESET memory range has

The CMD file is untouched

What does the above mean and what is the cause,

thanks

over 6 years ago

0 Baskaran Chidambaram over 6 years ago

TI__Genius 17370 points

From the information you gave above i couldnt understand what happens.

Please give more details on CCS version, Controlsuite version. attach the linker command you are using.

Also have you tried rebuilding the CCS project released in Controlsuite ? is it compiling ?

0 jw over 6 years ago in reply to Baskaran Chidambaram

Expert 1190 points

Fullscreen Map File F28035.txt Download

/*
// TI File $Revision: /main/4 $
// Checkin $Date: November 9, 2009   15:09:12 $
//###########################################################################
//
// FILE:	F2808.cmd
//
// TITLE:	Linker Command File For F2808 Device
//
//
// For BIOS applications add:      DSP2803x_Headers_BIOS.cmd
// For nonBIOS applications add:   DSP2803x_Headers_nonBIOS.cmd
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP2803x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP2803x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP2803x_headers\cmd to the
   library search path under project->build options, linker tab,
   library search path (-i).
/*========================================================= */
/*********************************************************************/
/*                         F28035 Memory Map                         */
/*                                                                   */
/*   Note: M0M1MAP and VMAP signals tied high on PICCOLO core        */
/*                                                                   */
/*   0x000000 - 0x0003ff   M0 SARAM                 (Prog and Data)  */
/*   0x000400 - 0x0007ff   M1 SARAM                 (Prog and Data)  */
/*   0x000800 - 0x001fff   Peripheral Frame0  (PF0) (Data only)      */
/*   0x006000 - 0x0063ff   Peripheral Frame1A (PF1A)(Data only)      */
/*   0x006400 - 0x0069ff   Peripheral Frame3  (PF3) (Data only)      */
/*   0x006a00 - 0x006fff   Peripheral Frame1  (PF1B)(Data only)      */
/*   0x007000 - 0x007fff   Peripheral Frame2  (PF2) (Data only)      */
/*   0x008000 - 0x0087ff   L0 SARAM                 (Prog and Data)  */
/*   0x008800 - 0x0087ff   L1 SARAM                 (Prog and Data)  */
/*   0x008c00 - 0x008bff   L2 SARAM                 (Prog and Data)  */
/*   0x009000 - 0x009fff   L3 SARAM                 (Prog and Data)  */
/*   0x3d7800 - 0x3d7bff   OTP                      (Prog and Data)  */
/*   0x3d7c80 - 0x3d7cbf   Device Cal (TI OTP)      (Prog and Data)  */
/*   0x3d7cc0 - 0x3d7cff   Boot Get Mode (TI OTP)   (Prog and Data)  */
/*   0x3d7e80 - 0x3d7e80   PARTID value             (Prog and Data)  */
/*   0x3d7e82 - 0x3d7eb0   Calibration Data		    (Prog and Data)  */
/*   0x3e8000 - 0x3f7fff   FLASH                    (Prog and Data)  */
/*   0x3f8000 - 0x3f87ff   L0 SARAM Mirror          (Prog and Data)  */
/*   0x3fe000 - 0x3fffff   BOOT ROM                 (Prog and Data)  */
/********************************************************************/




/* Define the memory block start/length for the F28035
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes:
         Memory blocks on F2803x are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program
         and/or data.

         L0 memory block is mirrored - that is
         it can be accessed in high memory or low memory.
         For simplicity only one instance is used in this
         linker file.

         Contiguous SARAM memory blocks or flash sectors can be
         be combined if required to create a larger memory block.
*/

MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   RAML0       : origin = 0x008000, length = 0x000800     		/* on-chip RAM block L0 */
   RAML1       : origin = 0x008800, length = 0x000400     		/* on-chip RAM block L1 */
   OTP         : origin = 0x3D7800, length = 0x000400     		/* on-chip OTP ONE TIME PROGRAMABLE MEMORY*/

   FLASH	   : origin = 0x3E8000, length = 0x00FF80     		/* FLASH, All sectors combined */
   CSM_RSVD   : origin = 0x3F7F80,  length = 0x000076     		/* Part of FLASHA.  Program with all 0x0000 when CSM  CODE SECURITY MODULE is in use. */
   BEGIN_FLASH : origin = 0x3F7FF6, length = 0x000002    		 /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL_P0 : origin = 0x3F7FF8,  length = 0x000008     		/* Part of FLASHA.  CSM password locations in FLASHA */

   IQTABLES    : origin = 0x3FE000, length = 0x000B50     		/* IQ Math Tables in Boot ROM */
   IQTABLES2   : origin = 0x3FEB50, length = 0x00008C    		 /* IQ Math Tables in Boot ROM */
   IQTABLES3   : origin = 0x3FEBDC, length = 0x0000AA	  		/* IQ Math Tables in Boot ROM */

   ROM         : origin = 0x3FF27C, length = 0x000D44     		/* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     		/* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E    		/* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */
   BOOT_RSVD   : origin = 0x000000, length = 0x000050     		/* Part of M0, BOOT rom will use this for stack */
   RAMM0       : origin = 0x000050, length = 0x0003B0     		/* on-chip RAM block M0 *///RAMM0       : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 *

   RAMM1       : origin = 0x000400, length = 0x000400     		/* on-chip RAM block M1 */
   RAMM2       : origin = 0x008C00, length = 0x000400     		/* on-chip RAM block L2   DATARAM       : origin = 0x008C00, length = 0x000400  */
   RAML3       : origin = 0x009000, length = 0x001000     		/* on-chip RAM block L3 */
   FLASHB      : origin = 0x3F4000, length = 0x002000     		/* on-chip FLASH */



}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{
/*** Compiler Required Sections ***/

     /* Program memory (PAGE 0) sections */
   .text            : {} > FLASH,      	PAGE = 0
   .cinit           : > FLASH,      	PAGE = 0
   .const           : > FLASH,        	PAGE = 0
   .econst          : > FLASH,        	PAGE = 0
   .pinit           : > FLASH,     		PAGE = 0
   .switch          : > FLASH,        	PAGE = 0

	  /* Data Memory (PAGE 1) sections */
	.ebss           : > RAMM0,         	PAGE = 1        //Table which Init global variables
	.cinit			: > RAMM0, 			PAGE = 1        //global and static variables
	.bss              > RAMM0,         	PAGE = 1        //global Varibles
 	.cio            : > RAMM0,         	PAGE = 1		//bUFFER for SDIO functions
 	.stack          : > RAMM1,     		PAGE = 1		//System stack

 	.esysmem        : > RAMM1,  		PAGE = 1		//memory for far malloc functions
 	.switch         : > RAMM1,     		PAGE = 1		//jump tables


 /*** User Defined Sections ***/
   csmpasswds        : > CSM_PWL_P0     PAGE = 0
   csm_rsvd          : > CSM_RSVD       PAGE = 0
   codestart         : > BEGIN_FLASH,   PAGE = 0         /* Used by file CodeStartBranch.asm */
   csm_rsvd          : > CSM_RSVD,      PAGE = 0         /* Used by file passwords.asm */

   dataram     		: > RAMM0,   		PAGE = 1				//new


  ramfuncs          : LOAD = FLASH,						 /*load from flash 		*/
                     RUN = RAML0, 						 /* Run in  RAML0		*/
                     LOAD_START(_RamfuncsLoadStart),     /* Starting Address 	*/
                     LOAD_SIZE(_RamfuncsLoadSize),
                     RUN_START(_RamfuncsRunStart),
                     PAGE = 0

  dataram           : LOAD = FLASH,	 					 /*load from flash to their run address in SARAM*/
                     RUN = RAMM0,
                     LOAD_START(_DataLoadStart),
                     LOAD_SIZE(_DataLoadSize),
                     RUN_START(_DataRunStart),
                     PAGE = 1



   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */

   .econst             : > FLASH       PAGE = 0			/* econst constants (e.g. const int k = 3;) FLASH */
   .switch             : > FLASH       PAGE = 0

   /* Allocate IQ math areas: */
   IQmath              : > FLASH       PAGE = 0            /* Math Code */
   IQmathTables        : > IQTABLES,   PAGE = 0, TYPE = NOLOAD

  /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
    /* Uncomment the section below if calling the IQNasin() or IQasin()
       functions from the IQMath.lib library in order to utilize the
       relevant IQ Math table in Boot ROM (This saves space and Boot ROM
       is 1 wait-state). If this section is not uncommented, IQmathTables2
       will be loaded into other memory (SARAM, Flash, etc.) and will take
       up space, but 0 wait-state is possible.
    */
    /*
    IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
    {

               IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

    }
    */

   /* .reset is a standard section used by the compiler.  It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 jw over 6 years ago in reply to jw

Expert 1190 points

Version: 7.2.0.00013

This happen after setting changing the output setting so that I can program a device with uni flash tool.

0 Baskaran Chidambaram over 6 years ago in reply to jw

TI__Genius 17370 points

i dont see RAML0L1 in the linker command file you attached.

Can you show what you changed in the output setting. Also please check if there are multiple linker command file included in the project.

0 jw over 6 years ago in reply to Baskaran Chidambaram

Expert 1190 points

Hi how does code composer manage the linker command file. The CMD file is in the project folder where it can be excluded or included from the build. There also a placed under resource general tab, where it can be selected. Currently the tab is blank. How is this manage, it's possible to have two linker.CMD files for the project. One visible at the project level and the other specified under resource explorer.

The project has two builds debug and release, the release build has it's own folder. I require a single linker cmd for both. I assume it uses the cmd file specified at the project level, as there should be only one in the project, is this correct?

In the release folder object file are followed by -{2000/E] what does this mean?

For clarification, In the project there a ram_link.CMD and F28035.cmd I assume it's ether or when the project is build?

automatic RTS selection: linking in "rts2800_ml.lib" in place of index
library "libc.a", what does this mean?

Why is this being redefined twice, I don't know where to look for this issue, can you provide guidance.

error: symbol "_ILLEGAL_ISR" redefined: first defined in
"./DSP2803x_DefaultIsr.obj"; redefined in "./source/DSP2803x_DefaultIsr.obj"

To answer your question,

There is only one CMD file enabled in the project.

i don't see RAML0L1 in the linker command file you attached. the file is based on the default which is included with the project.

I'm un sure what to do about this or if this is the problem

Thanks

0 Baskaran Chidambaram over 6 years ago in reply to jw

TI__Genius 17370 points

In general there can be multiple linker command files in a CCS project, as long as they dont have memory areas conflicting.

In your case you seem to have the one from project files and another one in build configuration. Please remove the one which you dont intend to keep.

Other warnings you see may be related to above reason. So first try the above and see if it solves your problem.

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CCS/TMS320F28035: Compiler Error