Tool/software: Code Composer Studio
Dear TI members,
I am working on the implementation of a three-phase inverter that operates synchronized to the grid (via a PLL algorithm), and I have some questions related to the configuration of the ADC for a three-phase input. I have described my questions below:
1) When I connect a single-phase ac signal ranging between 1-to-3V to ports ADCINA0 (v_ref_hi) and GRD of LAUNCHXL-F28027F, my ADCRESULT0, ADCRESULT1, and ADCRESULT2 are all displaying ac signals, but I expected only the first one to display values, while the other 2 should be reading nothing. Am I connecting the signal to wrong ports? Where should I connect the ground of the input signal? Should I use one of the ADC ports to receive the ground, and subtract the other ADC values from that?
2) When reading the input of the system for my DLOG_4CH, I apply a bitshift (dval1= AdcResult.ADCRESULT0<<3;); however, the signal is only positive. What is the most appropriate way to normalize this signal and make it range from +vpeak to -vpeak?
3) I am using my ePWM2 to trigger the ISR, in which I read the ADC results, call the PLL algorithm, and save it in buffers for visualization (it worked for a 1ph system). But now I am trying to optimize my ADC to be as fast and precise as possible. Could I apply oversampling to all 3 input signals (by using more SOC) to make the sampling better? How should I improve my ADC speed while keeping in mind how long it takes for the ISR to be completed?
4) Is the fastest sampling rate possible directly related to the value I set to (EPwm2Regs.TBPRD = ADC_SAMPLE_PERIOD;)? At the moment I am using a sampling rate of 50kHz, but since the clock is 60MHz I was hoping I would be able to push it up to 250-300kHz or more.
I apologize for the excess of questions, but it would be very helpful if I could get some guidance at this point since this is the first time I am working with ADCs and ISRs.
Thank you,
Victor