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TMS320F28379D: interrupt fires as soon as it is enabled, without any flags being set

Part Number: TMS320F28379D
Other Parts Discussed in Thread: TMS320F28377D

My customer has an issue with Timer 2 interrupt in which the service routine is called immediately after the interrupt is enabled, even though no TIF flags are set nor the timer has reached zero (countdown mode).

What is your recommendation for preventing this issue? 

Thank you!

  • Lenio,

    As you know, TIMER2 is connected directly to the CPU on core interrupt line INT14, and does not go through the PIE. Typically this timer is for TI/RTOS use. Is your customer using TI/RTOS? Or, is your customer using TIMER 2 for another use such as internal frequency measurement? Note that the IFR and IER are core registers and not memory mapped. They are configured by mask operations ("|=" and "&=") - please see Module 4 in the F28379D workshop for details:

    processors.wiki.ti.com/.../C2000_Multi-Day_Workshop

    Check to make sure your customer is not accidently setting the IFR instead of the IER. You can try using CCS to watch if the IFR is getting set, too.

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken
  • Hi Ken-

    I'm using TIMER2 for the FreeRTOS tick.

    I am using the following to set the IER bit:

    IER |= M_INT14;

    After this, I configure the timer for a 1ms interrupt as follows:

    ConfigCpuTimer(&CpuTimer2,SYSCLK_MHZ, 1000000 / configTICK_RATE_HZ);

    CpuTimer2Regs.TCR.all = 0x4000;

    Several instructions later, I globally enable interrupts with the following line, and immediately get an interrupt from TIMER2:

    __asm(" clrc INTM");

    The TIM register has only counted down by ~3000, and the TIF bit is not set.

    This seems to happen 100% of the time after I power-cycle the DSP, but inconsistently if I do a "soft" reset using CCS.

    Thanks for your help!

    --Chris

  • Chris,

    Could you please dump all of the TIMER2 register contents when it reads 3000 counts? This will be helpful.

    - Ken
  • Ken-

    Here are the Timer2 register values when the interrupt fires.  Looks like I was incorrect initially...the TIM has only counted down by ~300 counts instead of ~3000.

  • I should also add for clarity that I'm actually using an F2837x controlCARD R1.1 that has a TMS320F28377D
  • I think it would be good to try and confirm the interrupt was really taken - i.e. if the CPU went into the weeds it may have ended up there by chance. If you step through the CPU Timer ISR, does the PC return to a reasonable location in the code?
  • Hi Lori-

    Yes, it returns to the instruction immediately following "CLRC INTM"
  • Hi Chris,

    What is the frequency of SYSCLK? Did you configure the PLL to 200MHz and use it as a SYSCLK? Also, what is the configuration of TMR2CLKCTL register, can you please provide snapshot of that as well?

    Thanks,

    Nirav

  • Hi Nirav-

    SYSCLK should be 200MHz and use the PLL, I believe.  I think this is done with a call to InitSysCtrl() earlier in main().  Sorry...I'm less familiar with the clock configuration code.  TMR2CLKCTRL looks to be 0:

  • Hi Chris,

    All the configurations looks good. And based on the values read, it appears that interrupt should not have occurred as the Timer2 is still counting down.

    Can you globally disable the interrupt before you enable it by adding below 3 lines in your code? Something like this:

    __asm(" setc INTM"); // Disable global interrupt

    // Disable CPU interrupts and clear all CPU interrupt flags:
    IER = 0x0000;
    IFR = 0x0000;

    IER |= M_INT14;

    After this, I configure the timer for a 1ms interrupt as follows:

    ConfigCpuTimer(&CpuTimer2,SYSCLK_MHZ, 1000000 / configTICK_RATE_HZ);

    CpuTimer2Regs.TCR.all = 0x4000;

    Several instructions later, I globally enable interrupts with the following line, and immediately get an interrupt from TIMER2:

    __asm(" clrc INTM");
  • Hi Nirav-

    This worked! After digging in a little further, it looks like the only line I need to add is:

    IFR &= ~M_INT14;

    Not sure how or why this bit was being set, but I should be covered now in any case.

    Thanks to all for the help on this issue!
  • Chris Graunke said:
    This seems to happen 100% of the time after I power-cycle the DSP, but inconsistently if I do a "soft" reset using CCS.

    Chris,

    I'm looking at this a bit more.  The CPU timer is a free running counter that will be running on device reset.  Before you configure it using ConfigCpuTimer, first stop the timer and reload the period so everything in in a known state.  There is example code for this in the CpuTimers example - InitCpuTimers().  

    //
    // InitCpuTimers - This function initializes all three CPU timers to a known
    //                 state.
    //
    void InitCpuTimers(void)

    Regards,

    Lori 

  • Chris,

    Please let us know if you have any further questions. Also, please click the green "Verified Answer" button if you are satisfied with the support that was provided. This will also close the thread. Thank you again.

    - Ken