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CAN flash kernel and missing checksum

Gunter Schmer
Genius 14382 points

Part Number: TMS320F28069M

Hi,

we had a couple questions on the CAN Flash Kernel for the F2806x which is in C2000 Ware.

[] There are calls to F2806x Flash operations to erase and write. During these Flash operations, do interrupts need to be disabled, i.e. do these operations need to be atomic?

[] The CAN flash kernel does not have a checksum like the SCI flash kernel. In order for the CAN flash kernel to be reliable, an acknowledge message needs to go back to the CAN Host, to hold it off to send more CAN message until certain operations in the Flash kernel completed. In the SCI flash kernel, the checksum was used as an indirect ack to hold off writing a new block of data until the previous block as fully been written to flash. Can this be fixed on our side?

Regards,

--Gunter

  • 0
    TI__Mastermind 32995 points
    Hi,

    I believe the interrupts should be disabled. The Flash API may disable them itself, however. Please see flash programming examples and API User Guide.

    CAN communication includes a checksum/crc for data integrity in the protocol itself. SCI does not have any data integrity check besides a parity bit on individual bytes.

    I understand your point, you are free to modify the host and device code as you wish. This is why we provide the source code.

    Hope this helps,
    sal