Hi,
I'm trying to determine the cause of the processor reset on boot up, the obvious place to start is the RESC register - it has bits indicating the cause of the reset. However, the documentation (TRM) states:
2.3.2. External Reset
The XRSn bit in the RESC register will be set whenever XRS is driven low for any reason. This bit is then
cleared by the boot ROM.
2.3.3. Power-On Reset
After a POR, the POR and XRSn bits in RESC are set. These bits are then cleared by the boot ROM.
So at boot up, POR and XRSn are always 0. Therefore, how can I differentiate between a POR and a XRS driven reset?
Thanks,
Richard.
