CCS/TMS320F28379D: Interrupt_illegalOperationHandlern when after extending ramfunc area

Fikołek

Part Number: TMS320F28379D

Tool/software: Code Composer Studio

I put most of my code int ramfunc to improve performance but in certain moment i had to extend the area form RAMLS4_LS5 to RAMLS3_LS4_LS5 then my code started to skip in to Interrupt_illegalOperationHandler. I have also checked to change. I have not understood the reason of such behavior so i have removed some of "__attribute__((ramfunc))" to fit my code to RAMLS4_LS5 and it works. I have also added the section RAMLS2_LS3 and replaced with RAMLS4_LS5. The program also skip to Interrupt_illegalOperationHandler. Could You please help to understand and find reason of such strange behavior. The code works properly only when i put into RAMLS4_LS5. There is my linker filter in the attachment.

// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_C

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   BEGIN           	: origin = 0x080000, length = 0x000002
   RAMM0           	: origin = 0x000122, length = 0x0002DE
   RAMLS2_LS3     	: origin = 0x009000, length = 0x001000
   /*RAMLS2      		: origin = 0x009000, length = 0x000800*/
   /*RAMLS3      		: origin = 0x009800, length = 0x000800*/
   /*RAMLS4      	  : origin = 0x00A000, length = 0x000800*/
   /*RAMLS5           : origin = 0x00A800, length = 0x000800*/
   RAMLS4_LS5     	: origin = 0x00A000, length = 0x001000
   RESET           	: origin = 0x3FFFC0, length = 0x000002

   /* Flash sectors */
   FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
   FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
   FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */

PAGE 1 :

   BOOT_RSVD        : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1            : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMD1            : origin = 0x00B800, length = 0x000800

   RAMLS0          	: origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800


   RAM_GS0_GS15    	: origin = 0x00C000, length = 0x010000

   CLA1_MSGRAMLOW   : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH  : origin = 0x001500, length = 0x000080
}


SECTIONS
{
   /* Allocate program areas: */
   .cinit           : > FLASHB      PAGE = 0, ALIGN(4)
   .pinit           : > FLASHB,     PAGE = 0, ALIGN(4)
   .text            : >> FLASHB | FLASHC | FLASHD | FLASHE      PAGE = 0, ALIGN(4)
   codestart        : > BEGIN       PAGE = 0, ALIGN(4)

   /* Allocate uninitalized data sections: */
   .stack           : > RAMD0        PAGE = 1

   .ebss            : {} RUN = RAM_GS0_GS15,
                         RUN_START(_start_ebss),
                         RUN_END(_end_ebss),
                         PAGE = 1, ALIGN(4)
						 
   .esysmem         : > RAMD1       PAGE = 1

   /* Initalized sections go in Flash */
   .econst          : > FLASHF      PAGE = 0, ALIGN(4)
   .switch          : > FLASHB      PAGE = 0, ALIGN(4)

   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

   .binit    : >    FLASHN,    PAGE = 0    //ramfuncs copy info table

   Filter_RegsFile  : > RAM_GS0_GS15, PAGE = 1

	DigitalPower 	: > RAM_GS0_GS15, PAGE = 1

    SFRA_F_Data		: > RAM_GS0_GS15, ALIGN = 64, PAGE = 1

 	SFRA_Data		: > RAM_GS0_GS15, ALIGN = 64, PAGE=1

 	FPUmathTables	: > RAM_GS0_GS15, PAGE =1

    /* CLA specific sections */
   Cla1Prog         : LOAD = FLASHN,
                      RUN = RAMLS2_LS3,
                      LOAD_START(_Cla1funcsLoadStart),
                      LOAD_END(_Cla1funcsLoadEnd),
                      RUN_START(_Cla1funcsRunStart),
                      LOAD_SIZE(_Cla1funcsLoadSize),
                      PAGE = 0, ALIGN(4)

   CLADataLS0		: > RAMLS0, PAGE=1
   CLADataLS1		: > RAMLS1, PAGE=1

   Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
   CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} LOAD = FLASHN,
						 RUN = RAMLS2_LS3,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
						 PAGE = 0, ALIGN(4)
						 {
                         	--library=SFRA_F_Lib.lib<SFRA_F_INJECT.obj>
							--library=SFRA_F_Lib.lib<SFRA_F_COLLECT.obj>
                         }
   #else
   ramfuncs         : LOAD = FLASHN,
                      RUN = RAMLS2_LS3,
                      LOAD_START(_RamfuncsLoadStart),
                      LOAD_SIZE(_RamfuncsLoadSize),
                      LOAD_END(_RamfuncsLoadEnd),
                      RUN_START(_RamfuncsRunStart),
                      RUN_SIZE(_RamfuncsRunSize),
                      RUN_END(_RamfuncsRunEnd),
                      PAGE = 0, ALIGN(4)
                      {
                         	--library=SFRA_F_Lib.lib<SFRA_F_INJECT.obj>
							--library=SFRA_F_Lib.lib<SFRA_F_COLLECT.obj>
                      }
   #endif
#endif

   /* The following section definition are for SDFM examples */
#if 0
	Filter1_RegsFile : > RAMGS1,	PAGE = 1, fill=0x1111
	Filter2_RegsFile : > RAMGS2,	PAGE = 1, fill=0x2222
	Filter3_RegsFile : > RAMGS3,	PAGE = 1, fill=0x3333
	Filter4_RegsFile : > RAMGS4,	PAGE = 1, fill=0x4444
#endif
#ifdef CLA_C
   /* CLA C compiler sections */
   //
   // Must be allocated to memory the CLA has write access to
   //
   CLAscratch       :
                     { *.obj(CLAscratch)
                     . += CLA_SCRATCHPAD_SIZE;
                     *.obj(CLAscratch_end) } >  RAMLS1,  PAGE = 1

   .scratchpad      : > RAMLS1,       PAGE = 1
   .bss_cla		    : > RAMLS1,       PAGE = 1
   .const_cla	    :  LOAD = FLASHB,
                       RUN = RAMLS1,
                       RUN_START(_Cla1ConstRunStart),
                       LOAD_START(_Cla1ConstLoadStart),
                       LOAD_SIZE(_Cla1ConstLoadSize),
                       PAGE = 1
#endif //CLA_C
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

over 6 years ago

0 Ozino Odharo over 6 years ago

TI__Genius 17673 points

HI,

Seems like you are having issues placing function in RAM. Here is a wikipage that explains how the ramfunc attribute works and how to use it:

http://processors.wiki.ti.com/index.php/Placing_functions_in_RAM

Here is a wikipage that explains how to combine sections of memory http://processors.wiki.ti.com/index.php/C28x_Compiler_-_Understanding_Linking

If you continue to have issues with illegal interrupts, I would recommend you follow the debugging tips explained here. Please make sure your interrupts are correctly setup.

http://processors.wiki.ti.com/index.php/Interrupt_FAQ_for_C2000

Regards,

Ozino

0 Fikołek over 6 years ago in reply to Ozino Odharo

Intellectual 270 points

I know most of the documents but the descriptions are very enigmatic and without examples.

There is a mess in Your wiki and examples.

Firstly Why in ControlSuit cmd files Ram section looks like

.TI.ramfunc : {} LOAD = FLASHD,

RUN = RAMLS4_LS5,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(4)

and there is no table bint

if in the Wiki the code looks like:

 .TI.ramfunc : {} load=FLASH, run=RAM, table(BINIT)

What is the difference? Could You please provide any clear example?

Also In the Wiki http://processors.wiki.ti.com/index.php/C28x_Compiler_-_Understanding_Linking
there is no description of the .bint table

Accoreding to http://processors.wiki.ti.com/index.php/Interrupt_FAQ_for_C2000
How to check "Make sure that if any code is being loaded into flash and run from RAM that it is properly copied to RAM before the function is called"?


Why the code is working in RAMLS4_LS5  but not in RAMLS2_LS3?

0 Lori Heustess over 6 years ago in reply to Fikołek

TI__Guru* 91085 points

Hello,

I don't see anything in your .cmd file after skimming through it. This will require some debug. An ITRAP is often caused by a buffer or stack overflowing. Your stack is at 0x8000 - I'd start by confirming how large the stack has grown when you ITRAP.

To quickly see if it is the stack you can fill the region with a known value (memory fill with 0xABCD as an example) and then run the application. By the addresses written to you will be able to see how big the stack grew.
Insert a return instruction into the ITRAP ISR. Set a breakpoint on this instruction and then step to see where the code came from. By inspecting the disassembly at this location, and what the stack pointer (SP) is can give clues as to what happened.
Another option is to look at the stack. When you take an illegal instruction trap, registers are automatically pushed on the stack, including the return address. By looking at the return address value on the stack, you can find out where the ITRAP occurred.

T:ST0
ACC
P
AR1:AR0
DP:ST1
DBGSTAT:IER
Return Addr
empty  < SP points here (even or odd address)

-Lori

C2000™︎ microcontrollers

C2000 microcontrollers forum

CCS/TMS320F28379D: Interrupt_illegalOperationHandlern when after extending ramfunc area

http://processors.wiki.ti.com/index.php/Placing_functions_in_RAM

http://processors.wiki.ti.com/index.php/Interrupt_FAQ_for_C2000