Tool/software: TI C/C++ Compiler
We are using C2000 microcontroller to talk to 32-bit peripherals on the APB. We face issues with respect to 32-bit access of the peripheral registers.
CCS Version – 8.2.0
Compiler Version – TI v18.12.1.LTS
When we write a code of the format
Snippet 1:
Periph_Reg = Periph_Reg & ~(0x000F0000);
This is supposed to clear the bits <19:16> in the peripheral register.
Roughly translates to assembly code
(XAR4 stores the peripheral register address. P stores the current value of the peripheral register)
AND @PH, #0xfff0 - An AND operation of the MSB 16 bits is done with 0xFFF0
MOVL *+XAR4[0], P - The resulting 32-bit value stored in P register is copied to peripheral register address stored in XAR4
Whereas the same code if written as
Snippet 2:
Periph_Reg &= ~(0x000F0000);
Translates to following assembly code
AND *+XAR4[1], #0xfff8 - The 16-bit AND operation with MSB 16 bits is directly done on the peripheral register value.
We don't see any issues with snippet 1 whereas snippet 2 corrupts the LSB 16-bits of the data stored in peripheral register.
Is there a way to qualify the peripheral register access such that they are not optimised for 16-bit optimisation? Are there any other solutions to overcome this issue?
