Tool/software: Code Composer Studio
Dear Sir, madam,
I have initialized ePWM5A and 5B as follows
void Gpio_setup1(void){
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0; // Enable pullup on GPIO0
GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0; // Enable pullup on GPIO1
GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0; // Enable pullup on GPIO0
GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; // Enable pullup on GPIO1
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // GPIO0 = PWM1A
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // GPIO1 = PWM1B
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // GPIO0 = PWM2A
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // GPIO1 = PWM2B
GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // GPIO0 = PWM3A
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; // GPIO1 = PWM3B
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 1; // GPIO0 = PWM4A
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 1; // GPIO1 = PWM4B
GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 1; // GPIO0 = PWM5A
GpioCtrlRegs.GPADIR.bit.GPIO8=1;
GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 1; // GPIO1 = PWM5B
GpioCtrlRegs.GPADIR.bit.GPIO9=1;
GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO30 = 1;
EDIS;
}
void InitEPwm1Example(void)
{
//
// Setup TBCLK
//
//EPWM1 A and B are GPIO 0 and 1
EPwm1Regs.TBCTL.bit.CTRMODE = 0; // Count up down
EPwm1Regs.TBPRD = 3750; // Set timer period
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm1Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm1Regs.TBCTR = 0x0000; // Clear counter
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 001; // Clock ratio to SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV = 000;
EPwm1Regs.TBCTL.bit.SYNCOSEL=1;
EPwm1Regs.CMPA.half.CMPA =1875; // Set compare A value
EPwm1Regs.CMPB = 1875; // Set Compare B value
EPwm1Regs.DBCTL.bit.OUT_MODE=3;
EPwm1Regs.DBCTL.bit.POLSEL=2;
EPwm1Regs.DBCTL.bit.IN_MODE=0;
EPwm1Regs.DBRED=50;
EPwm1Regs.DBFED=50;
EPwm1Regs.AQCTLA.bit.CAU=2; // Set PWM1A on Zero
EPwm1Regs.AQCTLA.bit.PRD=1;
EPwm1Regs.AQCTLB.bit.CBU=2;
EPwm1Regs.AQCTLB.bit.PRD=1;
EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EPwm2Regs.TBCTL.bit.CTRMODE = 0; // Count up down
EPwm2Regs.TBPRD = 3750; // Set timer period
EPwm2Regs.TBCTL.bit.PHSEN = 1; // Disable phase loading
EPwm2Regs.TBPHS.half.TBPHS = 0; // Phase is 0
EPwm2Regs.TBCTL.bit.PHSDIR=0;
EPwm2Regs.TBCTR = 0x0000; // Clear counter
EPwm2Regs.TBCTL.bit.HSPCLKDIV = 001; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = 000;
EPwm2Regs.TBCTL.bit.SYNCOSEL=0;
EPwm2Regs.CMPA.half.CMPA =1875; // Set compare A value
EPwm2Regs.CMPB = 1875; // Set Compare B value
EPwm2Regs.DBCTL.bit.OUT_MODE=3;
EPwm2Regs.DBCTL.bit.POLSEL=2;
EPwm2Regs.DBCTL.bit.IN_MODE=0;
EPwm2Regs.DBRED=50;
EPwm2Regs.DBFED=50;
EPwm2Regs.AQCTLA.bit.CAU=2; // Set PWM1A on Zero
EPwm2Regs.AQCTLA.bit.PRD=1;
EPwm2Regs.AQCTLB.bit.CBU=2;
EPwm2Regs.AQCTLB.bit.PRD=1;
EPwm3Regs.TBCTL.bit.CTRMODE = 2; // Count up down
EPwm3Regs.TBPRD = 1875; // Set timer period
EPwm3Regs.TBCTL.bit.PHSEN = 1; // Disable phase loading
EPwm3Regs.TBPHS.half.TBPHS = 0; // Phase is 0
EPwm3Regs.TBCTL.bit.PHSDIR=0;
EPwm3Regs.TBCTR = 0x0000; // Clear counter
EPwm3Regs.TBCTL.bit.HSPCLKDIV = 001; // Clock ratio to SYSCLKOUT
EPwm3Regs.TBCTL.bit.CLKDIV = 000;
EPwm3Regs.TBCTL.bit.SYNCOSEL=0;
EPwm3Regs.CMPA.half.CMPA =937; // Set compare A value
EPwm3Regs.CMPB = 937; // Set Compare B value
EPwm3Regs.DBCTL.bit.OUT_MODE=3;
EPwm3Regs.DBCTL.bit.POLSEL=2;
EPwm3Regs.DBCTL.bit.IN_MODE=0;
EPwm3Regs.DBRED=50;
EPwm3Regs.DBFED=50;
EPwm3Regs.AQCTLA.bit.CAU=2; // Set PWM1A on Zero
EPwm3Regs.AQCTLA.bit.CAD=1;
EPwm3Regs.AQCTLB.bit.CBU=2;
EPwm3Regs.AQCTLB.bit.CBD=1;
EPwm4Regs.TBCTL.bit.CTRMODE = 2; // Count up down
EPwm4Regs.TBPRD = 1875; // Set timer period
EPwm4Regs.TBCTL.bit.PHSEN = 1; // Disable phase loading
EPwm4Regs.TBPHS.half.TBPHS = 0; // Phase is 0
EPwm4Regs.TBCTL.bit.PHSDIR=0;
EPwm4Regs.TBCTR = 0x0000; // Clear counter
EPwm4Regs.TBCTL.bit.HSPCLKDIV = 001; // Clock ratio to SYSCLKOUT
EPwm4Regs.TBCTL.bit.CLKDIV = 000;
EPwm4Regs.TBCTL.bit.SYNCOSEL=0;
EPwm4Regs.CMPA.half.CMPA =937; // Set compare A value
EPwm4Regs.CMPB = 937; // Set Compare B value
EPwm4Regs.DBCTL.bit.OUT_MODE=3;
EPwm4Regs.DBCTL.bit.POLSEL=2;
EPwm4Regs.DBCTL.bit.IN_MODE=0;
EPwm4Regs.DBRED=50;
EPwm4Regs.DBFED=50;
EPwm4Regs.AQCTLA.bit.CAU=2; // Set PWM1A on Zero
EPwm4Regs.AQCTLA.bit.CAD=1;
EPwm4Regs.AQCTLB.bit.CBU=2;
EPwm4Regs.AQCTLB.bit.CBD=1;
EPwm5Regs.TBCTL.bit.CTRMODE = 0; // Count up down
EPwm5Regs.TBPRD = 3750; // Set timer period
EPwm5Regs.TBCTL.bit.PHSEN = 1; // Disable phase loading
EPwm5Regs.TBPHS.half.TBPHS = 0; // Phase is 0
EPwm5Regs.TBCTL.bit.PHSDIR=0;
EPwm5Regs.TBCTR = 0x0000; // Clear counter
EPwm5Regs.TBCTL.bit.HSPCLKDIV = 001; // Clock ratio to SYSCLKOUT
EPwm5Regs.TBCTL.bit.CLKDIV = 000;
EPwm5Regs.TBCTL.bit.SYNCOSEL=0;
EPwm5Regs.CMPA.half.CMPA =1875; // Set compare A value
EPwm5Regs.CMPB = 1875; // Set Compare B value
EPwm5Regs.DBCTL.bit.OUT_MODE=3;
EPwm5Regs.DBCTL.bit.POLSEL=2;
EPwm5Regs.DBCTL.bit.IN_MODE=0;
EPwm5Regs.DBRED=50;
EPwm5Regs.DBFED=50;
EPwm5Regs.AQCTLA.bit.CAU=2; // Set PWM1A on Zero
EPwm5Regs.AQCTLA.bit.PRD=1;
EPwm5Regs.AQCTLB.bit.CBU=2;
EPwm5Regs.AQCTLB.bit.PRD=1;
}
In the main program, I called these two functions. All ePWMs are working fine except ePWM5A and 5B. Do, I need to change any other settings. Please help me in this regard.
