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Tool/software: Code Composer Studio
Dear experts,
I have a problem when trying to connect to the CLA on my new board. The board has two F28377D chips with the JTAGs in a chained connection. I am using the Spectrum Digital XDS200 emulator, and CCS v. 6.1.100022. I can connect and debug the CPU1 and CPU2 programs on the first chip in the JTAG chain, but when I try to connect to either of the CLA cores in the debug mode, the emulator gives an error connecting to the target. (error -1170 @ 0x0) Unable to access the DAP. Same problem with the second chip in the JTAG chain.
After that I edited the target configuration file .ccxml and dropped the JTAG emulator clock frequency from 10MHz to 1Mhz.In the higher clock the "Test connection" in the "Target configuration" window also fails, but succeeds in the 1MHz clock speed. However, even with that speed, the debugger refuses to connect to the CLA. Because of this test I suspected that maybe the long debug JTAG chain is the problem. Before this HW version I had quite similar card with two F28375D chips, with the difference that I had separate JTAG header pins for the two chips. In that card there was no problem in connecting to the CLAs. I had also a third board with chained JTAG connection between a F28377D and a F28067 and there the same chaining made no problems. The physical distance of the chips is about 50mm and longest inter-chip PCB lines about 60mm, with 33ohm serial termination resistors in the time critical signals.
I have two identical cards and the connection problem is same on both, so quite unlikely that both have defective CLAs. When testing, I tried to bypass various cores in the target configuration (I guess only the cores in the different chips need to be bypassed in the applied target configuration). Any ideas to try?
Regards,
Jouko
