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TMS320F28377S: TMS320F28377S & Altera MAX 10 FPGA firmware update method

cyan zhou
Expert 1500 points
Part Number: TMS320F28377S


Hi  Sir,

  we now use TMS320F28377S & Altera MAX 10 FPGA in our servo driver system.

Now we use upper computer to update F28377S firmware, and use JTAG to update FPGA firmware;

We attempt to finish updates only by using upper computer, that means we want to update FPGA firmware via F28377S by upper computer.

Could you have a check with it,  or how We can realize it? Below is the path: upper computer ->F28377S->EMIF->FPGA (Altera MAX 10).

Thanks.

  • 0
    TI__Expert 8105 points

    Cyan,

    Just to make sure I understand your question - your goal is to use the upper computer host to first program Flash on F28377s (via EMIF) and then you want a program running inside the F28377 to configure the FPGA through JTAG, right? If that is the case, then this can be done by dedicating a few GPIOs of the F28377 to drive JTAG signals going to the FPGA. With that connection in place you can now follow the JTAG protocol and Altera bitstream format to program the Altera FPGA.


    REgards,

    PEter

  • 0 in reply to Peter Galicki
    Expert 1500 points

    Hi，Peter,

    Thanks for your reply.

    Allow me to redescribe the chain:

    It's our current case:

    F28377S-> EMIF 1 -> FPGA:  two chip connect via EMIF1;

    upper computer host->via JTAG->program on-chip Flash of F28377S;

    upper computer host->via JTAG->program on-chip Flash of FPGA;

    Our request:

    upper computer host->via JTAG->program on-chip Flash of F28377S->via EMIF1->program on-chip Flash of FPGA;

    If that were possible, then, we just need an upper computer host to easily update firmware on the field, rather than to open the cover of driver box to shows the JTAG pin of FPGA to update FPGA's firmware.

    In addition, you mentioned, this can be done by dedicating a few GPIOs of the F28377 to drive JTAG signals going to the FPGA. Do you have some routines for reference?

    Thanks.

  • 0 in reply to Peter Galicki
    Expert 1500 points

    Hello Peter,

    Could you please help to check with it for above trouble?

    Regards,

  • 0 in reply to cyan zhou
    TI__Expert 8105 points

    Cyan,

    I think I now understand your question. Currently the host uses JTAG chain to program Flash on F28377S and configuring the FPGA. What you want to do is to configure the FPGA  through some GPIO pins of the F28377S, right?

    Most FGPAs support several methods of configuring the FPGA, one of them is JTAG, another is Host Serial Mode or Parallel Mode. You will need to contact the FPGA vendor what parallel protocol to use to configure the FPGA through GPIO pins. Next you have to write the software for F28377S to follow the protocol and drive the GPIO pins to configure the FPGA.

    Regards,

    PEter

  • 0 in reply to Peter Galicki
    Expert 1500 points

    Thanks. Peter.