This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28379S: eQEP maximum frequency (for "Quadrature-clock Mode")

Part Number: TMS320F28379S

Hello,

Could you please tell me the maximum frequency of the eQEP {QEPA and QPEB} inputs?

I'm reading its DS: Table 5-63. eQEP Timing Requirements.

- tw(QEPP) = 2tc(SYSCLK): It sounds to me that the frequency is half the SYSCLK

- tw(STROBH) = 2tc(SYSCLK): It sounds to me that the frequency is quarter of the SYSCLK.

(Edit: We assume "Quadrature-clock Mode" )

  • Yes, your understanding of the datasheet requirements is correct. Also note that those numbers assume you aren't using input qualification.

    Whitney

  • Whitney,

    Thank you for your reply.

    But it is not clear to me still now.

    Could you please tell me the maximum frequency of the eQEP {QEPA and QPEB} inputs?

  • What you've highlighted is the "input period" that the data sheet is referring to, so yes, the max frequency for QEPA and QEPB is half of the SYSCLK frequency.

    Whitney


  • Whitney,

    I'm sorry for missing to mention that we assume one of the eQEP mode "Quadrature-clock Mode". We need four QPOSCNT increments per {QEPA and QEPB} cycle.

    Could you please give your advise to me again?

  • Whitney,

    Could you please give your response once more?

    I'm sorry for missing to tell the condition "Quadrature-clock Mode" at the beginning.

    Thank you for your time.

  • Quadrature clock mode is what is depicted in the diagram you shared above. The answer I gave you before was with that in mind already. Can you explain what concern you have?

    Thanks,

    Whitney

  • Whitney,
    Thank you for your response.
    - Your latest answer is, "the max frequency for QEPA and QEPB is half of the SYSCLK frequency."
    - Four increments per QEPA and QEPB cycle.

    The items above would say that a couple of increments per SYSCLK. My concern is that it is true or not.

    I have thought the eQEP circuit is synchronous to the SYSCLK, therefore I expected that the "the max frequency for QEPA and QEPB" is /4 or /8 of the SYSCLK for the Quadrature-clock Mode. I thought four or eight clocks are required for four increments.

  • Hi Hideaki,

    Your thinking is correct, eQEP is synchronous to SYSCLK.

    Data sheet spec on max frequency of QA and QB of SYSCLK/2 represents the max speed at which QA or QB can be latched/detected by eQEP module. If QA and QB runs faster than SYSCLK/2 then the state transitions/edges will not be detected by eQEP and will be missed.

    Normally QA and QB will be 90 degree phase shifted and will not have state transitions simultaneously on the same SYSCLK cycle. If they do then eQEP will generate a "Phase Error Flag" as explained in the Technical Reference Manual". So in order to avoid QA and QB changing states simultaneously QA and QB both cannot run at the SYSCLK/2 frequency, but that does not impose a requirement of QA and QB to be SYSCLK/4 or SYSCLK/8 as even with that frequency they can have edges simultaneously and cause Phase Error.

    Regards,

    Nirav