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Tool/software: Code Composer Studio
From F28075 Technical Reference Manual , I read fllows:
The Control Law Accelerator extends the capabilities of the C28x CPU by adding parallel processing.Time-critical control loops serviced by the CLA can achieve low ADC sample to output delay.
But I don't know how to use CLA to achieve low ADC sample to output delay? Do you have example or more detail about it?
