CCS: CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.

shah zaman

Other Parts Discussed in Thread: TMS320F28377D, C2000WARE

Tool/software: Code Composer Studio

hi, I am working on TMS320F28377D dual core controller. There is no error after I build project but when I debug the program following message comes in console dialogue box and run button does not become green to run the project.

C28xx_CPU1: GEL Output:

Memory Map Initialization Complete

C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.

over 6 years ago

0 Whitney Dewey over 6 years ago

TI__Guru 54185 points

That Console message is totally normal after connecting to the F28377D. It's not an indication of an error--it's just informative. What is odd is that the Debug window isn't showing any cores.

How did you launch the debug session? If you launch it through the Target Configurations window vs through just hitting the debug button, do you see a difference? What .ccxml file are you using (one of C2000Ware, one you created, etc..)?

Whitney

0 shah zaman over 6 years ago in reply to Whitney Dewey

Intellectual 625 points

i made new target configuration file File -> New -> Target Configuration File. now it is working thanks

C2000™︎ microcontrollers

C2000 microcontrollers forum

CCS: CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.