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TMS320F28069F: XCLKOUT Restricted to 22.5 MHz?

Nicholas Stephens
Prodigy 105 points
Part Number: TMS320F28069F
Other Parts Discussed in Thread: MOTORWARE, , AMC1210

Hello!

Backstory:

I have a piccolo control card that has the TMS320F28069F micro on it. I am using this in a motor control application and utilizing motorware and the provided motoware labs with code composer studio.  In my application I am connecting the XCLKOUT pin (GPIO18) to an AMC1210 digital filter. I would like to run the AMC1210 CLK at 45 MHz. According to the technical reference manual (Reference 1 below) the XCLKOUTDIV can be set to SYSCLKOUT/2. This would be 45 MHz for the TMS320F28069F running at 90 MHz, and exactly what I want to do. And in fact, I did this for quite some time with everything functioning optimally. Then after reviewing the reference manual some more I noticed a note below table 1-21 (from Reference 1) stating that for maximum permissible XCLKOUT frequency see device datasheet. The datasheet for the TMS320F28069F (Reference 2 below) states that the maximum permissible XCLKOUT frequency is 22.5 MHz. 

Question:

What decides the 22.5 MHz maximum frequency restriction on the XCLKOUT (GPIO18) pin of the TMS320F28069F?

Thanks!

References:

  1. SPRUH18G "TMS320x2806x Piccolo Technical Reference Manual" Page 78; Table 1-21 "Clocking (XCLK) Field Descriptions" states that the XCLKOUTDIV  can be XCLKOUT = SYSCLKOUT, XCLKOUT = SYSCLKOUT/2, XCLKOUT = SYSCLKOUT/4, XCLKOUT = OFF.
  2. SPRS698G "TMS320F2806x Piccolo™ Microcontrollers"; Page 38; Table 5-6 "Device Clocking Requirements/Characteristics" states the maximum frequency is 22.5 MHz.
  3. SBAS372D "AMC1210 Quad Digital Filter for 2nd-Order Delta-Sigma Modulator"
  • 0
    TI__Guru* 95315 points

    What decides the 22.5 MHz maximum frequency restriction on the XCLKOUT (GPIO18) pin of the TMS320F28069F?

    It is the output buffer used on the XCLKOUT pin. Now, it is not that the pin will not toggle beyond 22.5 MHz, as you have figured out by now. However, the waveform characteristics may be sub-optimal. It could be that you have buffered this pin before feeding the clock to AMC1210. 

    The information provided in the datasheet always takes precedence. The TRM is just showing the options for the XCLKOUT pin (if for some reason, an application is clocking the device at 22.5 MHz, you could let XCLKOUT pin reflect the SYSCLKOUT frequency)

  • 0 in reply to Hareesh Janakiraman
    Prodigy 105 points

    Hareesh,

    Thank you for the quick response! Ahhhh! It is a function of the output buffer! Very interesting. We were speculating that it could be a thermal issue to the pin at higher frequencies. But if I am understanding you correctly you are saying that this isn't the case. I appreciate your time and answer thank you!

    Nick 

  • 0 in reply to Hareesh Janakiraman
    Prodigy 105 points

     After speaking with a colleague I'd like to follow up if you'd allow. We agree that the datasheet should be used first and foremost, however, we are after some information that is not in the datasheet and could potentially impact our final design.

    The fan out or design loading of the output GPIO's (specifically group 2 for this conversation) seems to not be given. There is a note (1) in table 5-10 of SPRS698G page 40, that states a load of 40pF should be assumed for the switching characteristics of XCLKOUT. However, Figure 5-4 on page 34 of the same document states that the test load for the output pins had approximately 5.85 pF of capacitance. Considering that a switching characteristics load capacitance of 40 pF was used (~6 times greater than the test load) this would indicate that the pin could drive at least this amount of capacitance and handle the related power (roughly 9.8 mW). Following the same math for 45 MHz and the design load capacitance, one finds that power is about 2.87 mW, far less than what was experienced during the switching characteristics testing. 

    Given that we are driving a single buffer gate relatively close (~10cm) to the processor and the waveshape at 45MHz is viewed to be a clean square wave do you see any other potential issues with my setup.

    To reiterate, I know that the datasheet states a maximum of 22.5 MHz, but without some of the missing specifications from the datasheet I am forced to make some assumptions and am unable to find an issue with driving the pin at 45MHz.

  • 0 in reply to Nicholas Stephens
    TI__Guru* 95315 points

    The fan out or design loading of the output GPIO's (specifically group 2 for this conversation) seems to not be given.

     

    The source/sink currents for Group 2 GPIO pins are given in section 5.4 in page 25. 

    If the PCB is well designed with termination and loading it may be fine. We provide the IBIS models to represent the switching characteristics of the IO cells in the application PCB context. You could download it from

    http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprm655&fileType=zip