This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28379S: Symmetric HRPWM

Part Number: TMS320F28379S
Other Parts Discussed in Thread: C2000WARE

Dear Sir ,

We are developing our product based on 283376S Chip , we are using several ePWMs channels separately  (e.g Channel A for  Output 1 , channel B   for Output 2 )

the complementary and dead time is done by hardware.

we mange to work the ePWM as we interned at 20Khz from Sysclk of 200Mhz , the PMW is symmetric around its mid point (e.g. PWM in Up - Dowm mode) , and we wish to work in high resolution

mode.

we have tried various example and read some post regarding  high resolution duty cycle in symmetric PMW , such as the post below 

http://e2e.ti.com/support/microcontrollers/c2000/f/171/t/698811?CCS-TMS320F28035-HRPWM-for-for-hi-res-duty-control-in-up-down-count-symmetric-mode

and came to conclusion (maybe we are doing something wrong)  that  for high resolution duty cycle cannot be achieved only by  MEP as it only  delay the edge of the PMW  and thus can not be symmetric (because  for symmetric it need to move the edges in opposite direction e.g delay the rising  edge and precede the falling edge )

1. please clarify this issue 

2.if you have example for duty cycle control in high resolution PWM (symmetric ) , please provide 

  • Hi,

    Please refer to "hrpwm_duty_sfo_v8" example available under C2000Ware  for duty control in high resolution mode.

    Thanks

    Vasudha

  • Hi Vasudha ,

    looking at the example i see the following  configuration hrpwm_duty_sfo_v8.c

    void HRPWM_Config(period)
    {

    ...

    ...

    EALLOW;
    (*ePWM[j]).HRCNFG.all = 0x0;
    (*ePWM[j]).HRCNFG.bit.EDGMODE = HR_FEP; // MEP control on falling edge
    (*ePWM[j]).HRCNFG.bit.CTLMODE = HR_CMP;
    (*ePWM[j]).HRCNFG.bit.HRLOAD = HR_CTR_ZERO;
    (*ePWM[j]).HRCNFG.bit.EDGMODEB = HR_FEP; // MEP control on falling edge
    (*ePWM[j]).HRCNFG.bit.CTLMODEB = HR_CMP;
    (*ePWM[j]).HRCNFG.bit.HRLOADB = HR_CTR_ZERO;
    #if (AUTOCONVERT)
    (*ePWM[j]).HRCNFG.bit.AUTOCONV = 1; // Enable auto-conversion
    // logic
    #endif
    (*ePWM[j]).HRPCTL.bit.HRPE = 0; // Turn off high-resolution period
    // control.
    EDIS;
    }
    }

    the edge mode is define FEP (MEP falling edge )  , so how could it be symmetric ?  what i am trying to understand 

    is it possible to create symmetric high resolution PWM , where one can control the in duty cycle in CMPHAR or CMPHAR that will affect both edge

    but in opposite direction (delay the rising edge and advance the falling edge , this we the signal is symmetric) ? 

  • Hi,

    Yes, the example demonsntrates the assymetric HR duty control.

    For symmetric, you need to make the edge mode as BEP. Also, the conclusion that HRPWM can only delay the edges is not correct.

    As mentioned in the above posted link, the up-down counter generated PWM will be symmetric  about period.

    Thanks

    Vasudha