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CCS/TMS320F28335: ADC Interrupt and CPU Timer 0 interrupt does not function together

Part Number: TMS320F28335
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Hello, this is similar to the previous post, however, I am unsure on how to handle the interrupts properly. Any guidance would be useful. My goal is to use ADC as much as possible but when the time comes, use the CPU timer 0 interrupt. The time for the timer varies as well.

Thank you in advance!

  • It's difficult to give general guidelines because it's very dependent on the application. It really depends on the priority and payload of each ISR. In a control application, the ADC ISR would typically be executing time critical code so you might want that to have the highest priority, and the other ISR's to be pre-empted by it. By way of example, below are a couple of ISRs set up this way on F28335.

    main()
    {
    // device init and so on...

    PieVectTable.ADCINT1 = &AdcIsr;
    PieVectTable.TINT0 = &Timer0Isr;
    PieCtrlRegs.PIEIER1.bit.INTx1 = 1;
    PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
    IER |= M_INT1;
    EINT;

    while(1);
    }


    interrupt void AdcIsr(void)
    {
    AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
    AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE

    // read ADC data
    xInput = (float) AdcResult.ADCRESULT0;
    yInput = (float) AdcResult.ADCRESULT1;

    // do time critical stuff here...
    }


    interrupt void Timer0Isr(void)
    {
    CpuTimer0Regs.TCR.bit.TIF = 1; // clear timer 0 interrupt flag
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // acknowledge PIE interrupt
    EINT; // allow nested interrupts

    // your pre-emptible code here...

    DINT; // mask global interrupts
    }

    This should work fine unless your ADC ISR payload is large enough to risks losing timer interrupts.

    There are some code examples in C2000Ware which should help you. See the "adc_soc" example for the ADC set up and use, and "sw_prioritized_interrupts" for multiple prioritized interrupts. There are some gotchas when you multiplex peripheral interrupts (see chapter 8.3 of the System Control & Interrupts user's guide for this device for more information) so the second example may help.

    Not sure if this is what you were looking for, but feel free to post back if you need anything more.

    Regards,

    Richard

  • I think it may be about my ISR payload being large, but now I am only able to get one interrupt from the CPU timer.

  • Hi,

    ADCINT and Timer0 falls in same PIE group in this device. ADC being higher priority interrupt, it is possible that both timer0 & ADCINT  interrupts are flagged at the same time wherein ADC ISR will be picked by PIE. Can you try the same code with timer1 or timer2 and check if you are getting both the interrupts?

    Thanks

    Vasudha

  • Yeah, changing it to the CPUtimer2 did the job. thank you so much for your help!