Part Number: TMS320F28027
Other Parts Discussed in Thread: CONTROLSUITE
Hi Team,
In the TI design from the below path, there have configuration about PWM2 and set PWM2 CMPA to period + 10, which is greater than TBPRD, my understanding is that there will not generate an event if CMPA greater than TBPRD, is that any reason to set CMPA = period + 10?
C:\ti\controlSUITE\development_kits\HVPSFB_v1.1
//Time Base SubModule Register
(*ePWM[n+1]).TBCTL.bit.PRDLD = TB_SHADOW;
(*ePWM[n+1]).TBPRD = period-1;
(*ePWM[n+1]).TBPHS.half.TBPHS = 0;
(*ePWM[n+1]).TBCTR = 0;
(*ePWM[n+1]).TBCTL.bit.CTRMODE = TB_COUNT_UP;
(*ePWM[n+1]).TBCTL.bit.PHSEN = TB_ENABLE;
(*ePWM[n+1]).TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // Sync "flow through" mode
(*ePWM[n+1]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
(*ePWM[n+1]).TBCTL.bit.CLKDIV = TB_DIV1;
// Counter compare submodule registers
(*ePWM[n+1]).CMPA.half.CMPA = period + 10; // Initial value
(*ePWM[n+1]).CMPB = 20; // Initial value
(*ePWM[n+1]).CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
(*ePWM[n+1]).CMPCTL.bit.SHDWAMODE = CC_SHADOW;
(*ePWM[n+1]).CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
(*ePWM[n+1]).CMPCTL.bit.SHDWBMODE = CC_SHADOW;
// Action Qualifier SubModule Registers
(*ePWM[n+1]).AQCTLA.bit.CAU = AQ_SET;
(*ePWM[n+1]).AQCTLA.bit.CBU = AQ_CLEAR;
(*ePWM[n+1]).AQCTLA.bit.ZRO = AQ_CLEAR;
(*ePWM[n+1]).AQCTLA.bit.PRD = AQ_CLEAR;
(*ePWM[n+1]).AQCTLB.bit.CBU = AQ_SET;
(*ePWM[n+1]).AQCTLB.bit.CAU = AQ_CLEAR;
(*ePWM[n+1]).AQCTLB.bit.ZRO = AQ_CLEAR;
(*ePWM[n+1]).AQCTLB.bit.PRD = AQ_CLEAR;
