CCS/TMS320F28335: .ebss size expansion

Amin Abolhasani

Tool/software: Code Composer Studio

Hi,

Is it possible to consolidate L0-L3 SARAM of the high 64k from the address 0x3f8000 to 0x3fc000 and L4-L7 SARAM from 0xc000 to 0x10000 in low 64k? Or, can I refer .ebss to two sections on the RAM?

I, actually, have merged L0-L3 of the low 64k, and decreased the size of them, and defined them as :

RAML0L3: origin=0x8000, length=0x1000 (in Page 0)

And, I merged and defined L4-L7 as:

RAML4L7: origin=0x9000, length=0x7000 (in Page 1)

My code works, and gives me the correct answer. But, I still need more memory. I have also defined:

RAML0L3H: origin=0x3F8000, length=0x4000 (in Page 1)

I only can define one .ebss, and I need more .ebss size. Can't I somehow add RAML4L7 and RAML0L3H defined above for assigning .ebss to them? Or, can I refer .ebss to two sections (actually, I did, but it seems that it is not working)?

Thank you

over 6 years ago

0 Christopher Chiarella over 6 years ago

TI__Mastermind 30255 points

Hello

Put all RAMLx onto page 0 and then you can combine them all. The pages are still there from legacy but you can move all memories to page 0 if you want.

Best regards

Chris

0 Amin Abolhasani over 6 years ago in reply to Christopher Chiarella

Prodigy 120 points

Thanks for your reply Christopher.

Even so, how do I add the memory from address 0x3f8000 to 0x3fc000 to the RAMLx? For example, can I say?

RAML4L7: origin=0x9000, length=0x7000

+ origin=0x3F8000, length=0x4000

0 Christopher Chiarella over 6 years ago in reply to Amin Abolhasani

TI__Mastermind 30255 points

Hello

Those you wouldn't be able to combine since they aren't contiguous.

I was referring to all the Lx from 0x8000 to 0x10000.

Check out this: https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/284770?28035-linker-file-problem-no-sufficient-memory-space-for-ebss

Best regards

Chris

0 Amin Abolhasani over 6 years ago in reply to Christopher Chiarella

Prodigy 120 points

Wonderful thread Chris! I was successful to split .ebss into two parts by defining two separate .c files, and I can see in .map file that each .obj file related to each .c file are located at a separated .ebss sections. However, when I run the code, and when I set a flag for starting the process of filling my large array up, I get illegal ISR trap interrupt. I changed the code in multiple ways and noticed that when I use the 0x3f8000 to 0x3fc000, the illegal ISR trap interrupt happens. Is it related to the initialization of the variable (array)?

Best,

Amin

0 Christopher Chiarella over 6 years ago in reply to Amin Abolhasani

TI__Mastermind 30255 points

Amin

I got some clarification on this as I am less familiar with F28335 versus some of the newer devices.

So the L0 to L3 at 0x8000 to 0xC000 is the same physical memory as the ones starting at 0x3F8000. There are just two addresses to access the same memory therefore you can't use "both" since its the same physical memory. So I would ignore the ones starting at 0x3F8000 and only uses those in the lower memory.

Best regards

Chris

0 Amin Abolhasani over 6 years ago in reply to Christopher Chiarella

Prodigy 120 points

I see!

Thank you for clarification, Chris!

Sincerely,

Amin

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CCS/TMS320F28335: .ebss size expansion