TMS320F2812: Problem about memcopy function

F.F

Part Number: TMS320F2812

Dear team:

My project runs normally in flash. But after I copy part of the program into H0SARAM, as long as the program runs into H0SARAM, it will enter an illegal interrupt (the interrupt is shown below).interrupt void ILLEGAL_ISR(void) // Illegal operation TRAP

{

// Insert ISR Code here

// Next two lines for debug only to halt the processor here

// Remove after inserting ISR Code

asm(" ESTOP0");

for(;;);

}

But if I copy the same program to L0SARAMA, it will not work properly. Is it because H0SARAM can't copy programs in the past? Below is the copy program:KickDog();

// Initialize the PLLCR to 0xA

InitPll(0xA);

/* Copy the secureRamFuncs section */

memcpy(&FLASH_SET_FUNCS_runstart, &FLASH_SET_FUNCS_loadstart,

&FLASH_SET_FUNCS_loadend - &FLASH_SET_FUNCS_loadstart);

/* Initialize the on-chip flash registers */

InitFlash();

// Initialize the peripheral clocks

InitPeripheralClocks();

This is the CMD file:

PRAMH0 : origin = 0x3F8000, length = 0x002000 /*used as program segment*/

FLASH_SET_FUNCS : LOAD = FLASHCD, PAGE = 0

RUN =PRAMH0 , PAGE = 0

RUN_START(_FLASH_SET_FUNCS_runstart),

LOAD_START(_FLASH_SET_FUNCS_loadstart),

LOAD_END(_FLASH_SET_FUNCS_loadend)

over 4 years ago

0 Kevin Allen18 over 4 years ago

TI__Mastermind 38295 points

Hi F.F.,

F.F said:

/* Copy the secureRamFuncs section */

memcpy(&FLASH_SET_FUNCS_runstart, &FLASH_SET_FUNCS_loadstart,

&FLASH_SET_FUNCS_loadend - &FLASH_SET_FUNCS_loadstart);

I think the arguments of your memcpy() function are out of order and may be causing this issue. See below, should be LoadStart then LoadEnd, then RunStart:

// Copy time critical code and Flash setup code to RAM
// The  RamfuncsLoadStart, RamfuncsLoadEnd, and RamfuncsRunStart
// symbols are created by the linker. Refer to the F2812.cmd file. 
   MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);

Please try that and let me know. If that's not it, are you able to debug where in your code the ILLEGAL_ISR is entering at?

Best,

Kevin

0 F.F over 4 years ago in reply to Kevin Allen18

Genius 3095 points

Dear Kevin:

I configure memcpy () as you said, but it will still enter an illegal interrupt. My current configuration is described in the document "Copying Compiler Sections From Flash to RAM on the TMS320F28xxx DSCs". If the same program is copied to other RAM to run, there will be no problem. If it is copied to PRAMH0, it will enter an illegal interrupt.

0 F.F over 4 years ago in reply to Kevin Allen18

Genius 3095 points

Dear Kevin:

Wait for your reply.

Thank you.

0 Kevin Allen18 over 4 years ago in reply to F.F

TI__Mastermind 38295 points

Hi F.F.,

Sorry for the delay.

Is there a specific function or line of code that is causing the illegal ISR? When debugging your code (either stepping through it or setting breakpoints) are you able to pin point the function or lines of code that jumps to the ISR after being executed?

Have you utilized #pragma's in your code to configure functions to run from RAM, like below?

// Functions that will be run from RAM need to be assigned to 
// a different section.  This section will then be mapped using
// the linker cmd file.
#pragma CODE_SECTION(eva_timer1_isr, "ramfuncs");
#pragma CODE_SECTION(eva_timer2_isr, "ramfuncs");
#pragma CODE_SECTION(evb_timer3_isr, "ramfuncs");

Additionally here are some steps you can follow to further debug the ITRAP:

http://processors.wiki.ti.com/index.php/Interrupt_FAQ_for_C2000#The_ITRAP_Interrupt

Best,

Kevin

0 F.F over 4 years ago in reply to Kevin Allen18

Genius 3095 points

MEMORY
{
PAGE 0 :
   
 RAML0    : origin = 0x008000, length = 0x001800
    EXTRAM0  : origin = 0x100000, length = 0x004000  
    OTP         : origin = 0x3D7800, length = 0x000800
    FLASHJ      : origin = 0x3D8000, length = 0x002000
 FLASHI      : origin = 0x3DA000, length = 0x002000
    FLASHH      : origin = 0x3DC000, length = 0x004000 
    FLASHG      : origin = 0x3E0000, length = 0x004000
/*   FLASHF      : origin = 0x3E4000, length = 0x004000*/
/*   FLASHE      : origin = 0x3E8000, length = 0x004000*/
 FLASHEF     : origin = 0x3E4000, length = 0x008000
/*    FLASHD      : origin = 0x3EC000, length = 0x004000 */
    FLASHCD     : origin = 0x3EC000, length = 0x008000
    FLASHB      : origin = 0x3F4000, length = 0x002000
    FLASHA      : origin = 0x3F6000, length = 0x001F80
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076    /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */   
    BEGIN       : origin = 0x3F7FF6, length = 0x000002
    PASSWDS     : origin = 0x3F7FF8, length = 0x000008

    PRAMH0      : origin = 0x3F8000, length = 0x002000  /*used as program segment*/
    ROM         : origin = 0x3FF000, length = 0x000FC0
   RESET       : origin = 0x3FFFC0, length = 0x000002           
    VECTORS     : origin = 0x3FFFC2, length = 0x00003E
         
PAGE 1 : 
   /* SARAM                     */     
 RAMM0    : origin = 0x000040, length = 0x0003c0
   RAMM1     : origin = 0x000400, length = 0x000400
   RAML1    : origin = 0x009800, length = 0x000800
 EXTRAM1  : origin = 0x104000, length = 0x01c000
   
   /*-------------------------------------------------------------*/
   DEV_EMU     : origin = 0x000880, length = 0x000180     /* device emulation registers */
   PIE_VECT    : origin = 0x000D00, length = 0x000100     /* PIE Vector Table */
   FLASH_REGS  : origin = 0x000A80, length = 0x000060     /* FLASH registers */
   CSM         : origin = 0x000AE0, length = 0x000010     /* code security module registers */
   XINTF       : origin = 0x000B20, length = 0x000020     /* external interface registers */
   CPU_TIMER0  : origin = 0x000C00, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 and Timer2 are reserved for BIOS)*/
   CPU_TIMER1  : origin = 0x000C08, length = 0x000008   
   CPU_TIMER2  : origin = 0x000C10, length = 0x000008   
   PIE_CTRL    : origin = 0x000CE0, length = 0x000020     /* PIE control registers */
   ECANA       : origin = 0x006000, length = 0x000040     /* eCAN control and status registers */ 
   ECANA_LAM   : origin = 0x006040, length = 0x000040     /* eCAN local acceptance masks */
   ECANA_MOTS  : origin = 0x006080, length = 0x000040     /* eCAN message object time stamps */
   ECANA_MOTO  : origin = 0x0060C0, length = 0x000040     /* eCAN object time-out registers */
   ECANA_MBOX  : origin = 0x006100, length = 0x000100     /* eCAN mailboxes */
   SYSTEM      : origin = 0x007010, length = 0x000020     /* System control registers */
   SPIA        : origin = 0x007040, length = 0x000010     /* SPI registers */
   SCIA        : origin = 0x007050, length = 0x000010     /* SCI-A registers */
   XINTRUPT    : origin = 0x007070, length = 0x000010     /* external interrupt registers */
   GPIOMUX     : origin = 0x0070C0, length = 0x000020     /* GPIO mux registers */
   GPIODAT     : origin = 0x0070E0, length = 0x000020     /* GPIO data registers */
   ADC         : origin = 0x007100, length = 0x000020     /* ADC registers */
   EVA         : origin = 0x007400, length = 0x000040     /* Event Manager A registers */
   EVB         : origin = 0x007500, length = 0x000040     /* Event Manager B registers */
   SCIB        : origin = 0x007750, length = 0x000010     /* SCI-B registers */
   MCBSPA      : origin = 0x007800, length = 0x000040     /* McBSP registers */
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations. */
 /*--------------------------------------------------------------*/
}
 

SECTIONS
{
 PieVectTableFile : > PIE_VECT,   PAGE = 1

 /*** Peripheral Frame 0 Register Structures ***/
 DevEmuRegsFile    : > DEV_EMU,     PAGE = 1
 FlashRegsFile     : > FLASH_REGS,  PAGE = 1
 CsmRegsFile       : > CSM,         PAGE = 1
 XintfRegsFile     : > XINTF,       PAGE = 1
 CpuTimer0RegsFile : > CPU_TIMER0,  PAGE = 1
 CpuTimer1RegsFile : > CPU_TIMER1,  PAGE = 1      
 CpuTimer2RegsFile : > CPU_TIMER2,  PAGE = 1        
 PieCtrlRegsFile   : > PIE_CTRL,    PAGE = 1     

 /*** Peripheral Frame 1 Register Structures ***/
 SysCtrlRegsFile   : > SYSTEM,      PAGE = 1
 SpiaRegsFile      : > SPIA,        PAGE = 1
 SciaRegsFile      : > SCIA,        PAGE = 1
 XIntruptRegsFile  : > XINTRUPT,    PAGE = 1
 GpioMuxRegsFile   : > GPIOMUX,     PAGE = 1
 GpioDataRegsFile  : > GPIODAT      PAGE = 1
 AdcRegsFile       : > ADC,         PAGE = 1
 EvaRegsFile       : > EVA,         PAGE = 1
 EvbRegsFile       : > EVB,         PAGE = 1
 ScibRegsFile      : > SCIB,        PAGE = 1
 McbspaRegsFile    : > MCBSPA,      PAGE = 1

 /*** Peripheral Frame 2 Register Structures ***/
 ECanaRegsFile     : > ECANA,       PAGE = 1
 ECanaLAMRegsFile  : > ECANA_LAM    PAGE = 1   
 ECanaMboxesFile   : > ECANA_MBOX   PAGE = 1
 ECanaMOTSRegsFile : > ECANA_MOTS   PAGE = 1
 ECanaMOTORegsFile : > ECANA_MOTO   PAGE = 1
 
 /*** Code Security Module Register Structures ***/
 CsmPwlFile        : > CSM_PWL,     PAGE = 1


    codestart         : > BEGIN,        PAGE = 0
   .text             : > FLASHCD,       PAGE = 0
   .cinit            : > FLASHCD,       PAGE = 0
   .pinit            : > FLASHCD,       PAGE = 0
 .switch    : > FLASHCD,       PAGE = 0
   .reset            : > RESET,       PAGE = 0,TYPE = DSECT
   .stack            : > RAMM1,        PAGE = 1
   .ebss             : > RAML1,       PAGE = 1
   .bss             : > RAML1,       PAGE = 1
   .econst           : > FLASHEF,      PAGE = 0
   .esysmem          : > RAML1,       PAGE = 1

    FLASH_SET_FUNCS  : LOAD = FLASHCD, PAGE = 0
        RUN = PRAMH0,    PAGE = 0

        RUN_START(_FLASH_SET_FUNCS_runstart),
        LOAD_START(_FLASH_SET_FUNCS_loadstart),
        LOAD_END(_FLASH_SET_FUNCS_loadend)
   ramfuncs             : LOAD = FLASHCD, PAGE = 0
                       RUN = PRAMH0, PAGE = 0

                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart)


 MONISECT0   : > EXTRAM1,    PAGE = 1
 MONISECT1   : > EXTRAM1,    PAGE = 1
 MONISECT2   : > EXTRAM1,    PAGE = 1
 MONISECT3   : > EXTRAM1,    PAGE = 1
 MONISECT4   : > EXTRAM1,    PAGE = 1
 MONISECT5   : > EXTRAM1,    PAGE = 1
 MONISECT6   : > EXTRAM1,    PAGE = 1
 MONISECT7   : > EXTRAM1,    PAGE = 1
 MONISECT8   : > EXTRAM1,    PAGE = 1
 MONISECT9   : > EXTRAM1,    PAGE = 1
 MONISECT10   : > EXTRAM1,    PAGE = 1
 MONISECT11   : > EXTRAM1,    PAGE = 1
 MONISECT12   : > EXTRAM1,    PAGE = 1
 MONISECT13   : > EXTRAM1,    PAGE = 1
 MONISECT14   : > EXTRAM1,    PAGE = 1
 MONISECT15   : > EXTRAM1,    PAGE = 1
 MONISECT16   : > EXTRAM1,    PAGE = 1
 MONISECT17   : > EXTRAM1,    PAGE = 1
 MONISECT18   : > EXTRAM1,    PAGE = 1
 MONISECT19   : > EXTRAM1,    PAGE = 1
 MONISECT20   : > EXTRAM1,    PAGE = 1
 MONISECT21   : > EXTRAM1,    PAGE = 1
 MONISECT22   : > EXTRAM1,    PAGE = 1
 MONISECT23   : > EXTRAM1,    PAGE = 1
 MONISECT24   : > EXTRAM1,    PAGE = 1
 MONISECT25   : > EXTRAM1,    PAGE = 1
 MONISECT26   : > EXTRAM1,    PAGE = 1
 MONISECT27   : > EXTRAM1,    PAGE = 1
 MONISECT28   : > EXTRAM1,    PAGE = 1
 MONISECT29   : > EXTRAM1,    PAGE = 1
 MONISECT30   : > EXTRAM1,    PAGE = 1
 MONISECT31   : > EXTRAM1,    PAGE = 1
 MONISECT32   : > EXTRAM1,    PAGE = 1
 MONISECT33   : > EXTRAM1,    PAGE = 1
 MONISECT34   : > EXTRAM1,    PAGE = 1
 MONISECT35   : > EXTRAM1,    PAGE = 1
 MONISECT36   : > EXTRAM1,    PAGE = 1
 MONISECT37   : > EXTRAM1,    PAGE = 1
 MONISECT38   : > EXTRAM1,    PAGE = 1
 MONISECT39   : > EXTRAM1,    PAGE = 1


}

只是将INIT_FLASH(void)COPY 到PRAMH0中，INIT_FLASH程序如下：EALLOW;

FlashRegs.FPWR.bit.PWR=3;               //Flash运行于活跃模式

FlashRegs.FSTATUS.bit.V3STAT=1;         //清除报警

FlashRegs.FBANKWAIT.bit.RANDWAIT=5;     //随机存取时间

FlashRegs.FBANKWAIT.bit.PAGEWAIT=5;     //页面存取时间

//FlashRegs.FOTPWAIT.bit.OPTWAIT=5;       //OTP读等待时间

FlashRegs.FOPT.bit.ENPIPE=1;            //启动管线模式以提高性能

EDIS;

asm(" RPT #7 || NOP ");



// When a single-step operation enters the second or third article of the INIT_FLASH program, it is possible to jump into the following illegal interruption.



interrupt void ILLEGAL_ISR(void) // Illegal operation TRAP

{

// Insert ISR Code here

// Next two lines for debug only to halt the processor here

// Remove after inserting ISR Code

asm(" ESTOP0");

for(;;);

}

But if you copy INIT_FLASH to RAMM0, there will be no illegal interruption.

0 Kevin Allen18 over 4 years ago in reply to F.F

TI__Mastermind 38295 points

Hi F.F.,

You should be able to run from H0 SARAM, as it's 0 wait-state RAM just like RAM M0. Can you try setting H0 SARAM to page 1 instead of 0?

RAMH0       : origin = 0x3F8000, length = 0x002000     /* on-chip RAM block H0 */

If that doesn't work try the debug steps in the wiki page below to find when the ITRAP occurred:

Another option is to look at the stack. When you take an illegal instruction trap, registers are automatically pushed on the stack, including the return address. By looking at the return address value on the stack, you can find out where the ITRAP occurred.

http://processors.wiki.ti.com/index.php/Interrupt_FAQ_for_C2000#The_ITRAP_Interrupt

Best,

Kevin

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TMS320F2812: Problem about memcopy function