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TMS320F280049: Compiling warning: creating output section "xxx" without a SECTIONS

Brian Wang0
Expert 5230 points
Part Number: TMS320F280049
Other Parts Discussed in Thread: C2000WARE

Hi team,

I am supporting my customer trying to port FCL to F280049.

The porting is based on FCL_379XL. What are doing is basically changing the header files, and CMD files. We fixed several errors caused by the changing of code. However we cannot fix the warning:  creating output section "xxx" without a SECTIONS.

According to my understanding, the issue is caused by f28004x_globalvariabledefs.c in which we defined sections but we do have corresponding sections in .CMD files.

#ifdef __cplusplus
#pragma DATA_SECTION("AdcaResultFile")
#else
#pragma DATA_SECTION(AdcaResultRegs,"AdcaResultFile");
#endif
volatile struct ADC_RESULT_REGS AdcaResultRegs;

However, when we looking at the original .cmd of F2837x or .cmd of F28004x, we did not see any register files. But they can be compiled without any warnings.

Could you help to explain why this could happen?

  • 0
    TI__Genius 10845 points

    Hi,

    This warning would come if the linker cmd file does not have these sections defined. Can you check if you are comparing against the correct linker cmd file from F2837x or F28004x?

    Thanks

    Vasudha

  • 0 in reply to Vasudha Bhadoria
    TI__Expert 5230 points

    This is the original CMD used by FCL example code.

    Obviously, there is no  peripheral regs either:

    MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN           	: origin = 0x000000, length = 0x000002
   RAMM0           	: origin = 0x000122, length = 0x0002DE
//;   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMLS0LS1LS2LS3LS4LS5     : origin = 0x008000, length = 0x003000
   RAMGS456789		: origin = 0x010000, length = 0x006000
//;   RAMLS0          	: origin = 0x008000, length = 0x000800
//;   RAMLS1          	: origin = 0x008800, length = 0x000800
//;   RAMLS2      		: origin = 0x009000, length = 0x000800
//;   RAMLS3      		: origin = 0x009800, length = 0x000800
//;   RAMLS4      		: origin = 0x00A000, length = 0x000800
   RESET           	: origin = 0x3FFFC0, length = 0x000002

PAGE 1 :

   BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
//;   RAMD1           : origin = 0x00B800, length = 0x000800

   RAMD0D1     : origin = 0x00B000, length = 0x001000

//;   RAMLS5      : origin = 0x00A800, length = 0x000800
   RAMGS0GS1      : origin = 0x00C000, length = 0x002000

//;   RAMGS0      : origin = 0x00C000, length = 0x001000
//;   RAMGS1      : origin = 0x00D000, length = 0x001000
   RAMGS2      : origin = 0x00E000, length = 0x001000
   RAMGS3      : origin = 0x00F000, length = 0x001000
/*   RAMGS4      : origin = 0x010000, length = 0x001000
   RAMGS5      : origin = 0x011000, length = 0x001000
   RAMGS6      : origin = 0x012000, length = 0x001000
   RAMGS7      : origin = 0x013000, length = 0x001000
   RAMGS8      : origin = 0x014000, length = 0x001000
   RAMGS9      : origin = 0x015000, length = 0x001000
*/   RAMGS10     : origin = 0x016000, length = 0x001000
   RAMGS11     : origin = 0x017000, length = 0x001000
}


SECTIONS
{
   codestart        : > BEGIN,     PAGE = 0
#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
       .TI.ramfunc :  > RAMM0  PAGE=0
    #else
       ramfuncs         : > RAMM0      PAGE = 0
   #endif
#endif


   .text            : >>RAMLS0LS1LS2LS3LS4LS5	| RAMGS456789,   PAGE = 0
   .cinit           : > RAMGS456789,     PAGE = 0
   .pinit           : > RAMM0,     PAGE = 0
   .switch          : > RAMM0,     PAGE = 0
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

   .stack           : > RAMM1,     PAGE = 1
   .ebss            : > RAMD0D1|RAMGS0GS1,     PAGE = 1
   .econst          : > RAMD0D1|RAMGS2,     PAGE = 1
   .esysmem         : > RAMD0D1,     PAGE = 1
   Filter_RegsFile  : > RAMGS0GS1,	   PAGE = 1

   // DCL lib
   dclfuncs         : > RAMD0D1|RAMGS0GS1,     PAGE = 1

   /* SFRA test */
   SFRA_F_Data     : > RAMGS11, PAGE = 1
   FPUmathTables   : > RAMGS11, PAGE = 1
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

  • 0 in reply to Brian Wang0
    TI__Genius 10845 points

    Hi,

    These peripheral register related sections are defined in another linker cmd file. Can you check if the original project has a separate linker file for peripheral register related sections? The default file used in C2000Ware projects is "f28004x_headers_nonbios.cmd" available under "C2000Ware/device_support/f28004x/headers/cmd".

    Thanks

    Vasudha