Other Parts Discussed in Thread: MAX3232
Tool/software: Code Composer Studio
Hello,
I am using SCIA for receiving the data from dongle used for GSM communication. The SCI RX interrupt work fine with dongle when processor start. But when I remove the dongle and reconnect with processor then it stops working. I am using max3232 IC for communication between processor and dongle. And on DSO we observe the pulse of 300ms (high--low--high) on RX pin SCIA (it will come because I am connecting dongle and dongle get supply when we connect it). and after this RX interrupt stop working. I also using ADC interrupt and SCIC interrupt (both TX and RX) in code and when I put a delay of 1us in ADC interrupt or in SCIC RX interrupt then SCIA RX start working normally.(I check this one by one).
I also check the register value by the debugger but values are the same. And global interrupt and SCIA RX interrupt flag are also clear(adc interrupt is also working fine even when SCIA RX Interrupt stops working).
When I check the " rx_sci_a=SciaRegs.SCIRXBUF.all" value I get 35768. This indicates the frame error. But I already clear it into the RX ISR. When this come RX interrupts stop working.
So I am not able to understand what is wrong.
This is the initialization code for SCI RX.
unsigned char rx_sci_a;
__interrupt void sciaRxFifoIsr(void)
{ // GSM Modem : RS232
rx_sci_a=SciaRegs.SCIRXBUF.all; // Read data
SciaRegs.SCIFFCT.all = 0x00;
SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1; // Clear Overflow flag
SciaRegs.SCIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all= PIEACK_GROUP9 ; // Issue PIE ack
}
void init_serial_a(void){
init_scia_gpio();
EALLOW;
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER9.bit.INTx1 = 1; // PIE Group 9, INT1 rx interrupt enable
PieCtrlRegs.PIEIER9.bit.INTx2 = 1; // PIE Group 9, INT2 tx interrupt enable
EDIS;
scia_fifo_init();
}
void scia_fifo_init(void){
EALLOW;
SciaRegs.SCICCR.all = 0x0007; // 1 stop bit, No loopback // No parity,8 char bits, // async mode, idle-line protocol
SciaRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK, // Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL2.bit.TXINTENA = 1;
SciaRegs.SCICTL2.bit.RXBKINTENA = 1;
SciaRegs.SCIHBAUD.all = 0x0002; //9600
SciaRegs.SCILBAUD.all = 0x008B;
SciaRegs.SCICCR.bit.LOOPBKENA =0 ; // Enable loop back
SciaRegs.SCIFFTX.all = 0xC021;
SciaRegs.SCIFFRX.all = 0x0021;
SciaRegs.SCIFFCT.all = 0x00;
SciaRegs.SCICTL1.all = 0x0023; // Relinquish SCI from Reset
SciaRegs.SCIFFTX.bit.TXFIFORESET = 1;
SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;
EDIS;
}