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TMS320F28379D: UART echoback on 2 board

Part Number: TMS320F28379D


I am trying to make echo back example on 2 board one transmitter and the other receiver

but it doesn't work

this is the code of transmitter

//
// Included Files
//
#include "F28x_Project.h"
//
// Globals
//
Uint16 LoopCount;
//
// Function Prototypes
//
void scia_echoback_init(void);
void scia_fifo_init(void);
void scia_xmit(int a);
void scia_msg(char *msg);
//
// Main
//
void main(void)
{
    Uint16 ReceivedChar;
    char *msg;
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
   InitSysCtrl();
//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//
   InitGpio();
//
// For this example, only init the pins for the SCI-A port.
//  GPIO_SetupPinMux() - Sets the GPxMUX1/2 and GPyMUX1/2 register bits
//  GPIO_SetupPinOptions() - Sets the direction and configuration of the GPIOS
// These functions are found in the F2837xD_Gpio.c file.
//
   GPIO_SetupPinMux(9, GPIO_MUX_CPU1, 6);
   GPIO_SetupPinOptions(9, GPIO_INPUT, GPIO_PUSHPULL);
   GPIO_SetupPinMux(8, GPIO_MUX_CPU1, 6);
   GPIO_SetupPinOptions(8, GPIO_OUTPUT, GPIO_ASYNC);
//
// Step 3. Clear all __interrupts and initialize PIE vector table:
// Disable CPU __interrupts
//
   DINT;
//
// Initialize PIE control registers to their default state.
// The default state is all PIE __interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
   InitPieCtrl();
//
// Disable CPU __interrupts and clear all CPU __interrupt flags:
//
   IER = 0x0000;
   IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the __interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
   InitPieVectTable();
//
// Step 4. User specific code:
//
   LoopCount = 0;
   scia_fifo_init();       // Initialize the SCI FIFO
   scia_echoback_init();   // Initialize SCI for echoback
//   msg = "Enter Massage:  \0";
//      scia_msg(msg);
//
//      msg = "Enter Massage:  \0";
//      scia_msg(msg);
      for(;;)
      {
          msg = "Enter Massage:  \0";
          scia_msg(msg);
          //
          // Wait for inc character
          //
          //while(SciaRegs.SCIFFRX.bit.RXFFST == 0) { } // wait for empty state
          //
          // Get character
          //
          //ReceivedChar = SciaRegs.SCIRXBUF.all;
          //
          // Echo character back
          //
          //msg = "Enter Massage:  \0";
          //scia_msg(msg);
          //scia_xmit(ReceivedChar);
       //LoopCount++;
   }
}
//
//  scia_echoback_init - Test 1,SCIA  DLB, 8-bit word, baud rate 0x000F,
//                       default, 1 STOP bit, no parity
//
void scia_echoback_init()
{
    //
    // Note: Clocks were turned on to the SCIA peripheral
    // in the InitSysCtrl() function
    //
    SciaRegs.SCICCR.all = 0x0007;   // 1 stop bit,  No loopback
                                    // No parity,8 char bits,
                                    // async mode, idle-line protocol
    SciaRegs.SCICTL1.all = 0x0003;  // enable TX, RX, internal SCICLK,
                                    // Disable RX ERR, SLEEP, TXWAKE
    SciaRegs.SCICTL2.all = 0x0003;  //enable TX,RX interrupt
    SciaRegs.SCICTL2.bit.TXINTENA = 1;
    SciaRegs.SCICTL2.bit.RXBKINTENA = 1;
    //
    // SCIA at 9600 baud
    // @LSPCLK = 50 MHz (200 MHz SYSCLK) HBAUD = 0x02 and LBAUD = 0x8B.
    // @LSPCLK = 30 MHz (120 MHz SYSCLK) HBAUD = 0x01 and LBAUD = 0x86.
    //
    SciaRegs.SCIHBAUD.all = 0x0002;
    SciaRegs.SCILBAUD.all = 0x008B;
    SciaRegs.SCICTL1.all = 0x0023;  // Relinquish SCI from Reset
}
//
// scia_xmit - Transmit a character from the SCI
//
void scia_xmit(int a)
{
    while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
    SciaRegs.SCITXBUF.all =a;
}
//
// scia_msg - Transmit message via SCIA
//
void scia_msg(char * msg)
{
    int i;
    i = 0;
    while(msg[i] != '\0')
    {
        scia_xmit(msg[i]);
        i++;
    }
}
//
// scia_fifo_init - Initialize the SCI FIFO
//
void scia_fifo_init()
{
    SciaRegs.SCIFFTX.all = 0xE040;  //clear interrupt flag, re-enable operation, enable enhancements, resume operation for auto-baud
    SciaRegs.SCIFFRX.all = 0x2044;  //clear interrupt flag, re-enable operation, interrupt level
    SciaRegs.SCIFFCT.all = 0x0;
}
//
// End of file
//
and this the code of receiver
//
// Included Files
//
#include "F28x_Project.h"
//
// Globals
//
Uint16 LoopCount;
//
// Function Prototypes
//
void scia_echoback_init(void);
void scia_fifo_init(void);
void scia_xmit(int a);
void scia_msg(char *msg);
void wait (void);
//
// Main
//
void main(void)
{
    Uint16 ReceivedChar;
    char *msg;
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
   InitSysCtrl();
//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//
   InitGpio();
//
// For this example, only init the pins for the SCI-A port.
//  GPIO_SetupPinMux() - Sets the GPxMUX1/2 and GPyMUX1/2 register bits
//  GPIO_SetupPinOptions() - Sets the direction and configuration of the GPIOS
// These functions are found in the F2837xD_Gpio.c file.
//
   GPIO_SetupPinMux(9, GPIO_MUX_CPU1, 6);
   GPIO_SetupPinOptions(9, GPIO_INPUT, GPIO_PUSHPULL);
   GPIO_SetupPinMux(8, GPIO_MUX_CPU1, 6);
   GPIO_SetupPinOptions(8, GPIO_OUTPUT, GPIO_ASYNC);
//
// Step 3. Clear all __interrupts and initialize PIE vector table:
// Disable CPU __interrupts
//
   DINT;
//
// Initialize PIE control registers to their default state.
// The default state is all PIE __interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
   InitPieCtrl();
//
// Disable CPU __interrupts and clear all CPU __interrupt flags:
//
   IER = 0x0000;
   IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the __interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
   InitPieVectTable();
//
// Step 4. User specific code:
//
   LoopCount = 0;
   scia_fifo_init();       // Initialize the SCI FIFO
   scia_echoback_init();   // Initialize SCI for echoback
//   msg = "Enter Massage:  \0";
//      scia_msg(msg);
//
//      msg = "Enter Massage:  \0";
//      scia_msg(msg);
      for(;;)
      {
         // msg = "Enter Massage:  \0";
          //scia_msg(msg);
          //
          // Wait for inc character
          //
          wait();// wait for empty state
          //
          // Get character
          //
          ReceivedChar = SciaRegs.SCIRXBUF.all;
          //
          // Echo character back
          //
          //msg = "Enter Massage:  \0";
          //scia_msg(msg);
          //scia_xmit(ReceivedChar);
       //LoopCount++;
   }
}
//
//  scia_echoback_init - Test 1,SCIA  DLB, 8-bit word, baud rate 0x000F,
//                       default, 1 STOP bit, no parity
//
void scia_echoback_init()
{
    //
    // Note: Clocks were turned on to the SCIA peripheral
    // in the InitSysCtrl() function
    //
    SciaRegs.SCICCR.all = 0x0007;   // 1 stop bit,  No loopback
                                    // No parity,8 char bits,
                                    // async mode, idle-line protocol
    SciaRegs.SCICTL1.all = 0x0003;  // enable TX, RX, internal SCICLK,
                                    // Disable RX ERR, SLEEP, TXWAKE
    SciaRegs.SCICTL2.all = 0x0003;  //enable TX,RX interrupt
    SciaRegs.SCICTL2.bit.TXINTENA = 1;
    SciaRegs.SCICTL2.bit.RXBKINTENA = 1;
    //
    // SCIA at 9600 baud
    // @LSPCLK = 50 MHz (200 MHz SYSCLK) HBAUD = 0x02 and LBAUD = 0x8B.
    // @LSPCLK = 30 MHz (120 MHz SYSCLK) HBAUD = 0x01 and LBAUD = 0x86.
    //
    SciaRegs.SCIHBAUD.all = 0x0002;
    SciaRegs.SCILBAUD.all = 0x008B;
    SciaRegs.SCICTL1.all = 0x0023;  // Relinquish SCI from Reset
}
//
// scia_xmit - Transmit a character from the SCI
//
void scia_xmit(int a)
{
    while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
    SciaRegs.SCITXBUF.all =a;
}
//
// scia_msg - Transmit message via SCIA
//
void scia_msg(char * msg)
{
    int i;
    i = 0;
    while(msg[i] != '\0')
    {
        scia_xmit(msg[i]);
        i++;
    }
}
//
// scia_fifo_init - Initialize the SCI FIFO
//
void scia_fifo_init()
{
    SciaRegs.SCIFFTX.all = 0xE040;  //clear interrupt flag, re-enable operation, enable enhancements, resume operation for auto-baud
    SciaRegs.SCIFFRX.all = 0x2044;  //clear interrupt flag, re-enable operation, interrupt level
    SciaRegs.SCIFFCT.all = 0x0;
}
void wait (void)
{
    while(SciaRegs.SCIFFRX.bit.RXFFST == 0) { }
}
//
// End of file
//
  • hi Ahmed,

    Could you tell me what are you trying to achieve ?

    Are you trying to send and echo content back at the device 2 back to the device 1?

    When you say doesn't work ? Are you not seeing signals on the line ?

    Can you try internal loopback and check if the tx config is correct ?

    Regards.

  • Hi MEGHANA,

    I want to send 16 byte to the receiver then the receiver till me that it get the 16 byte,

    I am trying in another code I find that transmitter should send 32 byte to receiver as init transmitting before 

    sending 16 byte that I want to send ,

    does that normal ?

    now I can transmitting from board 1 to board 2 but I can't make board 2 transmitting to board 1at the same time

    I tried loop back and it work

  • Hi ,

    The FIFO tx and Rx interrupt levels can be set as needed.

    In the code expecting the  32 bits upfront , the 32 bits are sent to trigger the interrupt.

    Please try using an ISR if you wish to send and receive together since this is more time precise.

    But please note precidence of these 2 isr would be fixed..please check interrupt table

    Regards.