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TMS320F28377S: SPI frequency

A GIR
Genius 3615 points
Part Number: TMS320F28377S
Other Parts Discussed in Thread: C2000WARE

Hello

I use the SPI(a) with an external FRAM, then I set the LSPCLK to 200MHz instead of 50MHz to reach speed up to 50MHz on Memory clock.

Now, on other SPi (b), I want drive an SSI feedback.

But some feedback has maximum clock frequency to 1Mhz..

But with LSPCLK which applied to all SPI, the minimum SPI clock is 200MHz/128 = 1.5625.

To have lower clock, I must reduce the LSPCLK, but this impact the memory clock frequency.

Is there some solution to keep an SPI at 50MHz and an other lower than 1MHz?

Thank

  • 0
    TI__Guru** 115881 points

    Hi,

    That does not seems feasible.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Genius 3615 points

    Hello

    I will also used the Biss and Endat library.

    These library use the SPI in Slave mode. Then the Clock is generated by PWM via CLB.

    Can I have a simple exemple to do the same?:

    Use the SPI in Slave, Trig by software a new generation of a specified number clock pulse at a specified frequency.

    Note: For the Biss library, the SetFreq API is bad documented. The text correspond to the CRC function, and limit of input are not giver. Parameter indicate to be in us, but this not be seems the case.

  • 0 in reply to A GIR
    TI__Guru** 115881 points

    Assigning this to the TI expert on Endat.

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    TI__Mastermind 24095 points

    Hi,

    For your case, if you want to use SPI in Slave mode you can input independent clock - not divider of LSPCLK.
    You can simply use a EPWM module (or a eCAP module in APWM mode) and generate 1MHz signal and feed it back to SPI clock.

    CLB is used for generating the clock in EnDat/BiSS-C modules and SPI is in slave mode.
    Since it's currently available as library - this is not configurable by user.
    But in the latest C2000ware release coming out this week, we are releasing tool to configure CLB and several examples.


  • 0 in reply to Subrahmanya
    Genius 3615 points

    Hello

    I understand what you said. The only difficult to me is to know how generate a specific number of clock pulse corresponding to the SSI coder resolution?

    The Aim I think is to trig the ePwm module (by software in setting a specific trig bit?) then ePwm generate the configurate number of bit. But how?

  • 0 in reply to A GIR
    Genius 3615 points

    Is anybody can explain to me how configure Pwm to generate a specified number of pulse when asked by software?

  • 0 in reply to A GIR
    TI__Mastermind 24095 points

    Hi,

    There is no direct hardware feature in PWM to generate specified N number of pulses.
    This needs to be tracked in software and disabled after required number of pulses generated.
    You can configure PWM to generate desired frequency, take interrupt on every counter zero, count the number of pulses in software and disable the PWM after the desired number of pulses is generated.
    Disabling and enabling can be done by Forcing the PWM output (via configuring Trip zone and forcing in s/w using TZFRC and clearing the same as needed).
    Or it can also be done by using the shadowing feature of AQCTL regs. You can switch between AQCTL configurations when you generate pulses vs when you disable them.
    Even in both options above you still have to keep track of the number of pulses in software by counting the same in an ISR.

  • 0 in reply to Subrahmanya
    Genius 3615 points

    Hi,

    This seems so complicated and take some software ressource time :-(

    Is the way used in Biss and EnDat Library?

    May be we could use the PWM chopper submodule?

  • 0 in reply to A GIR
    TI__Mastermind 24095 points

    Hi,

    Yes - it indeed adds to software cycles overhead. But it's not complicated at all.
    You could also do this using CLB (Configurable Logic Block).
    CLB Configuration tool and examples are provided in the latest C2000ware release.
    Please download from http://www.ti.com/tool/C2000WARE
    Refer to documentation under http://www.ti.com/lit/ug/spruir8/spruir8.pdf 
    and examples under C:\ti\c2000\C2000Ware_2_00_00_03\driverlib\f2837xd\examples\cpu1\clb

    I believe EPWM based method is easily doable, though it does consume cycles to keep track of number of pulses etc.

  • 0 in reply to Subrahmanya
    TI__Mastermind 24095 points

    Hi,

    "Is the way used in Biss and EnDat Library?"

    These are based on the CLB based clock generation.