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TMS320F28377D: cpu2 boot to flash

Part Number: TMS320F28377D


I have configured cpu2 with OTP boot corntrol register with 0x00000B5A still cpu2 is not booting from flash . may pls provide proper document for boot to flash procedure for both core .

  • are you able to get CPU1 in flash boot ?

    Once CPU1 starts booting it will release CPU2 from reset at some point (you can refer boot flowchart in TRM section 3.12)

    Regards

    Baskaran

  • I am using 320f28377d launchpad i am able to program both core when debugger is connected and both core is working fine  then i disconnected  debugger and pull down the TRST pin and reconnected the debugger (usb cable) only CPU1 is working.

    another observation when I pull down the TRST pin and GPIO 72 &84 and reconnected the debugger still cpu1 is working.

    I am confusing when i pull down GPIO 72 &84 boot to flash from CPU1 also should not happen.

  • CPU1 will be working till you reset the device. TRST is just the debugger connection which wont reset the device. only when the device resets and boots again it will go ahead and reas GPIO 72 & 84.

    When you say CPU2 is not working what are you observing.  Are you able to connect to CPU2 core ?

  • ok , understood but the power is also generating through usb cable in launch pad so POR should work .but  as you said  is right  once i am resetting cpu1 is not working when GPIO72 and GPIO84 pull down. otherwise it is working.

    In  CPU2 i am running a EPWM5 . and its is working fine with debugger . i have configured in CPU1 command register for EPWM5. can you suggest setting to be done in cpu1 and cpu2 flash setting for boot through flash.

  • You can refer Figures 4-2, 4-3, 4-7 in TRM for the flow. 

    You seem to configure the registers and pull up the pins correctly.

    Have you programmed the image on to CPU2 flash ?> Can you check and confirm this (at address 0x80000 from CPU2).

    Regards

    Baskaran