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TMS320F280049: C2000™ microcontrollers forum

Dan Abbey
Prodigy 590 points

Part Number: TMS320F280049

Hi Team, 

I'm working with a customer who's looking to interface ~5 C2000 devices as part of a high accuracy motor control system. FSI daisy chain looks like a promising option, however they'd like to use the interface at a lower frequency. Do you have any information that could help with the below request: 

Regarding our FSI implementation concept, we are evaluating the daisy chain concept you (T.I.) has described in SPRACM3–May 2019.http://www.ti.com/lit/an/spracm3/spracm3.pdf

To help us evaluating our expected system performance, could you estimate what the numbers in table 5 page 13 would be, if clock was 10 MHz (instead of 50 MHz)?

It does not need to be exact, but just better than multiplying the numbers by 5 

Thanks,

Dan

  • 0
    TI__Guru 52080 points

    I will send this to the writer of the Application Report.

  • 0
    TI__Mastermind 45606 points

    Hi Dan,

    The values in table 5 were found during test of the three device daisy-chain connection, shown in Figure 9. You're right that it won't be as simple as multiplying by 5 for 10 MHz speed, since the time it takes to move data to/from buffers won't be related to the FSI transmission frequency.

    You can look at Table 4 to get some sort of idea if using a 10 MHz clock, though this is only shown for the DMA case. If using the CPU to move data or if additional processing is needed on the data received, then the times will be longer as you'd expect.

    Can you give some additional information on how FSI is intended to be used in this topology? Then I could provide you with an answer that better fits the customer use case.

    • Do you know how many words (16-bit data) will need be transferred at a time? (i.e. data frame size)
    • How is the data received intended to be used? Will there be any form of processing on the data received?
    • Are you just interested in how long it takes to transmit/receive a certain amount of data? or do you also care about the processing and moving of this data?
      • If you just want the transmit time, I can pretty easily provide the theoretical time along with an equation.

    Best,

    Kevin

  • 0 in reply to Kevin Allen18
    TI__Prodigy 590 points

    Hi Kevin, 

    Thanks, I've sent you a presentation /block diagram explaining the use case further, please keep this internal. 

    The number of words transmitted at a time will vary: The customer would like to estimate transition times for 4, 6, and 12 words

    Data will only be processed at the final destination (i.e only one C2000 will process data, the rest will just pass the data on). 

    the interest is to be able to estimate the transmit / receive times to each of the boards in the daisy chain. understanding the overall latency of the system is critical to determining if the topology can be used or not. 

    BR 

    Dan

  • 0 in reply to Dan Abbey
    TI__Mastermind 45606 points

    Hi Dan,

    OK, thanks. I received it. Here is how we can estimate the transition time for one device in a FSI daisy-chain topology, as discussed in the SPRACM3 application report.

    Let's break the communication down into three parts, (1) processing time (2) move data time (3) transmission time.

    1) Processing Time (PT):

    How long it takes to process and use the data received before sending data to the next device in the chain. Can't really estimate this since it will depend on the application. Can be ignored if looking at devices that simply pass-through data and don't process it.

    2) Move Data Time (MDT):

    How long it takes to move data from one location of memory to another. This would be if you're wanting to buffer the received data or move data into the FSI TX buffer to be transmitted. Ideally you'll want to use the DMA for moving the data rather than the CPU, as it will be much faster and save CPU processing power.

    To calculate the number of SYSCLK cycles it takes to transfer data using the DMA we can use the below equation from the datasheet:

    DMA SYSCLK cycles = (# of Bursts) * [(3 cycles/word) * (# of words per burst) + (# of DMA channels)]

    3) Transmission Time (TT):

    How long it takes to transfer the FSI data out, dependent on the FSI clock speed and number of data signals being used. An FSI data frame has the structure below, which consists of 24 bits of overhead, 8 bits of User Data, up to sixteen 16-bit words, and 8 bits of CRC.

    To calculate the number of FSI clock cycles it takes to transmit a data frame of 'n' words with 'd' data lines (up to 2):

    FSI Cycles = 24 (bits of overhead) / 2 + [n * 16 (bits/word) + 8 (bits of UD) + 8 (bits CRC)] / (2 * d)

    * divide by 2 for Double Data Rate (DDR) ==> See TRM section

    Lets estimate how long it takes to transfer 4 words (16-bits each) with one data line (D0) at a 10 MHz FSI clock frequency, and using the DMA to move data into the FSI transmit buffer.

    Calculating PT:

    Will leave as PT. Can ignore if no processing needed.

    Calculating MDT:

    # of Bursts = 1

    # of words per burst = 4 (data words) + 1 (User Data) = 5

    # of DMA channels = 1 (for data) + 1 (User Data) = 2

    • User Data transfer is needed to kick off the FSI transmission automatically

    DMA SYSCLK cycles = 1 * [(3 cycles/word) * 5 + 2] = 17  SYSCLK cycles

    MDT = (DMA SYSCLK cycles) / (SYSCLK Freq) = 17 / 100 MHz = 0.17 us

    Calculating TT:

    n = 4 (words),     d = 1 (data lines)

    FSI Cycles = 24 / 2 + [4 * 16 + 8 + 8] / (2 * 1) = 52 FSI cycles

    TT = (FSI Cycles) / (FSI Freq) = 52 / 10 MHz = 5.2 us

    Total Transfer Time (4 words) = MDT + TT + (PT) = 0.17 us + 5.2 us + (PT) = 5.37 us + (PT)

    Total Transfer Time (6 words) = 7.03 us + (PT)

    Total Transfer Time (12 words) = 12.01 us + (PT)

    Additional delay could be added to this if using isolators or transceivers, but probably nothing significant.

    Best,

    Kevin