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CCS/TMS320F28377D: Initialized global variables not being initialized on CPU2

Part Number: TMS320F28377D


Tool/software: Code Composer Studio

I am trying to run my code from _FLASH _STANDALONE on a TMS320F28377D.
I am using CCS Version: 9.1.0.00010 with CGT v18.12.3 LTS.
No updates are available for my system.

I see that my initialized global variables are not being initialized on CPU2.
I have narrowed the problem down to variables that are in global shared memory on CPU2.
The problem does not occur with local shared memory variables or on CPU1.
CPU1 assigns ownership of the global shared areas being used by CPU2 to CPU2 then sends the sync signal.
The variables are initialized when I run everything from RAM with the emulator.
I need the local shared memory for the CLA.

Do I have to do something special to get these variables initialized on CPU2 at boot time or do I have to just initialize them manually on power up?

  • Hi,

    Are you assigning the global shared RAM to CPU2 in CPU1 code before booting CPU2 ? Can you share the CPU1 code which assign RAMs to CPU2 and boots CPU2.

    Regards,

    Vivek Singh

  • The beginning of the CPU2 code has:

    	// wait for CPU1 to finish configuring peripherals and assigning ownership
    	WaitForIpcFlag(5);
    

    CPU1 is doing a bunch of peripheral initialization including this:

    	EALLOW;
    	
    	// Give Memory Access to GS10 - GS15 SARAM to CPU02
    	while( !(MemCfgRegs.GSxMSEL.bit.MSEL_GS10 &
    			MemCfgRegs.GSxMSEL.bit.MSEL_GS11&
    			MemCfgRegs.GSxMSEL.bit.MSEL_GS12&
    			MemCfgRegs.GSxMSEL.bit.MSEL_GS13&
    			MemCfgRegs.GSxMSEL.bit.MSEL_GS14&
    			MemCfgRegs.GSxMSEL.bit.MSEL_GS15))
    	{
    		MemCfgRegs.GSxMSEL.bit.MSEL_GS10 = 1;
    		MemCfgRegs.GSxMSEL.bit.MSEL_GS11 = 1;
    		MemCfgRegs.GSxMSEL.bit.MSEL_GS12 = 1;
    		MemCfgRegs.GSxMSEL.bit.MSEL_GS13 = 1;
    		MemCfgRegs.GSxMSEL.bit.MSEL_GS14 = 1;
    		MemCfgRegs.GSxMSEL.bit.MSEL_GS15 = 1;
    	}
    
    	EDIS;

    When CPU1 is done with all the initialization it does this before enabling its interrupts:

    // tell CPU2 that ownership has been assigned and synch powerup
    IpcSync(5);

    Your question reminded me that near the beginning of CPU1's peripheral initialization it is doing this:

    #ifdef _STANDALONE
    #ifdef _FLASH
    // Send boot command to allow the CPU2 application to begin execution
    IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
    #else
    // Send boot command to allow the CPU2 application to begin execution
    IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM);
    #endif
    #endif

    Should this be done after the assignment of ownership of the global memory ?

    I'll have to try that, thanks for the idea...John

  • Good catch, THANKS so much. Wish it had not been so hard to narrow down.

    My rotor is levitating again and now running from FLASH.

    Can you think of any other boot order dependent issues that might happen like this to CPU2?