CCS/TMS320F28335: The RAM version project can’t run normally after use 28335 external RAM

Hi,

This is strange. That statement is only making GPIO50 as input which should be already the case (be default pin is input). Also since that is GPIO pin, it should have not impact on XINTF functionality. Can you probe the GPIO50 pin and see what happens to pin state after execution of this instruction. Also I am assuming you are using your customer board. Please check GPIO50 is connected to which logic on board.

Regards,

Vivek Singh

Hi,

  I are using my customer board, GPIO50 is used to Light up LED lights。When I debug “GpioCtrlRegs.GPBDIR.bit.GPIO50 = 1;”,The GPIO50 pin state is unchanged in RAM version project, But CCS3.3 stop and give a warn:
  Trouble Setting Breakpoint with the Action "Continue or Finish Stepping" at 0x100763: Error 0x00000008/-1066 Error during: Break Point,  Cannot set/verify breakpoint at 0x00100763 
  Breakpoint Manager: Retrying with a Legacy Hardware breakpoint
  
  I think  the logic of GPIO50 is right because the LED light is light up normally when I change Text Section(.text) from external RAM in XINTF Zone 6  return to 28335 Internal RAM in RAM version project.
 
  How solve the question?
  Regards
  scqxlxc

scqxlxc,

Is XINTF operating in 32b mode?  If so, you may be having problems because GPIO50 is mux'd with XD29.

-Tommy

Hi,Tommy:

 XINTF operating in 16b mode in my DSP28335 program, Please see the below code:

 //--- Zone 6 Configuration
 XintfRegs.XTIMING6.bit.X2TIMING = 0; // Timing scale factor = 1
 XintfRegs.XTIMING6.bit.XSIZE = 3; // 3 means 16-bit interface
 XintfRegs.XTIMING6.bit.READYMODE = 1;  // XREADY is asynchronous
 XintfRegs.XTIMING6.bit.USEREADY = 0; // Disable XREADY
 XintfRegs.XTIMING6.bit.XRDLEAD = 1; // Read lead time
 XintfRegs.XTIMING6.bit.XRDACTIVE = 2; // Read active time
 XintfRegs.XTIMING6.bit.XRDTRAIL = 0; // Read trail time
 XintfRegs.XTIMING6.bit.XWRLEAD = 1; // Write lead time
 XintfRegs.XTIMING6.bit.XWRACTIVE = 2; // Write active time
 XintfRegs.XTIMING6.bit.XWRTRAIL = 0; // Write trail time

Regards
  scqxlxc

scqxlxc,

Can you confirm my understanding that the system only works if GpioCtrlRegs.GPBDIR.bit.GPIO50 is cleared to 0?

If so, the device may be suffering from power brownout if there is too much load on GPIO50.

-Tommy

Hi,Tommy:

   I confirm that the system only works if GpioCtrlRegs.GPBDIR.bit.GPIO50 is cleared to 0 in the RAM version project, But the system can work normally if GpioCtrlRegs.GPBDIR.bit.GPIO50 is set to 1 in the Flash version project. So I guess my device don't suffer from power brownout.

scqxlxc,

I recommend investigating the potential of power brownout a little more.  The Flash wait-states may be slowing down your code execution enough to compensate for power brownout.

-Tommy

Hi,Tommy:
    I can't find the potential of power brownout. I do much tests, and find that the question only happen when Text Section(.text) is configured to ExtRAM. If I only configured Text Section(.text) into InnerRAM as below picture, the system can work normally even GpioCtrlRegs.GPBDIR.bit.GPIO50 is set to 1 in the RAM version project.

     But when I configured Text Section(.text) into ExtRAM, if I debug “GpioCtrlRegs.GPBDIR.bit.GPIO50 = 1;”, CCS3.3 stop and give a warn:
Trouble Setting Breakpoint with the Action "Continue or Finish Stepping" at 0x100763: Error 0x00000008/-1066 Error during: Break Point, Cannot set/verify breakpoint at 0x00100763
    Breakpoint Manager: Retrying with a Legacy Hardware breakpoint
    Why the question is happen?

Regards

scqxlxc,

The .text section contains executable code. In order to use the external memory, XINTF must first be initialized through code execution. It will not be possible to access the external memory out of reset without some XINTF initialization executing out of FLASH or through GEL scripts.

I am not sure how BIOS handles situations where .text is allocated to external memory. If it is not done correctly, you will have undesired behavior.

Note that in a self-booting system (not initialized, loaded, and executed through CCS), you will not be able to store the .text section in external ASRAM because it is volatile. Code will need to be stored in non-volatile memory and moved to ASRAM during system boot.

-Tommy