Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: TIDM-HV-1PH-DCAC, C2000WARE
Tool/software: Code Composer Studio
Hi all,
I am sensing a single phase offseted AC voltage from the grid. and using the PLL library to synchronize with it. But the spll1,theta[0] output is giving a 250 Hz saw tooth waveform.
My ADC ISR time period is 21us. Please help with the synchronization. I have enclosed the code below:
#include "F28x_Project.h"
#include "stdio.h"
#include "math.h"// Main include file
#include "IQMathlib.h"
#include "SPLL_1ph.h"
SPLL_1ph spll1;
SPLL_LPF_COEFF spll_lpf_coef1;
#define B0_LPF SPLL_Q(166.877556)
#define B1_LPF SPLL_Q(-166.322444)
#define A1_LPF SPLL_Q(-1.0)
//--- Global Variables
#define PI 3.14159
#define GRID_FREQ 50
#define ISR_FREQUENCY 100000
#define c1 0.1
#define c2 0.00001
//
// Function Prototypes
//
void ConfigureADC(void);
void ConfigureEPWM(void);
void SetupADCEpwm(Uint16 channel);
interrupt void adca1_isr(void);
//
// Defines
//
#define RESULTS_BUFFER_SIZE 256
//
// Globals
//
int16 AdcaResults[RESULTS_BUFFER_SIZE];
Uint16 AdcBuf[RESULTS_BUFFER_SIZE];
Uint16 resultsIndex;
volatile Uint16 bufferFull;
void main(void)
{
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
InitSysCtrl();
//
// Step 2. Initialize GPIO:
// This example function is found in the F2837xD_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
//
InitGpio(); // Skipped for this example
//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
DINT;
//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
InitPieCtrl();
//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
IER = 0x0000;
IFR = 0x0000;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
InitPieVectTable();
spll_lpf_coef1.B0_lf=B0_LPF;
spll_lpf_coef1.B1_lf=B1_LPF;
spll_lpf_coef1.A1_lf=A1_LPF;
SPLL_1ph_init(GRID_FREQ,_IQ21((float)(0.000021)), &spll1);
//
// Map ISR functions
//
EALLOW;
PieVectTable.ADCA1_INT = &adca1_isr; //function for ADCA interrupt 1
EDIS;
//
// Configure the ADC and power it up
//
ConfigureADC();
//
// Configure the ePWM
//
ConfigureEPWM();
//
// Setup the ADC for ePWM triggered conversions on channel 0
//
SetupADCEpwm(0);
//
// Enable global Interrupts and higher priority real-time debug events:
//
IER |= M_INT1; //Enable group 1 interrupts
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
//
// Initialize results buffer
//
for(resultsIndex = 0; resultsIndex < RESULTS_BUFFER_SIZE; resultsIndex++)
{
AdcaResults[resultsIndex] = 0;
AdcBuf[resultsIndex] = 0;
}
resultsIndex = 0;
bufferFull = 0;
//
// enable PIE interrupt
//
PieCtrlRegs.PIEIER1.bit.INTx1 = 1;
//
// sync ePWM
//
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
//
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 0x00;
GpioCtrlRegs.GPADIR.bit.GPIO16 = 1;
//take conversions indefinitely in loop
//
do
{
//
//start ePWM
//
EPwm1Regs.ETSEL.bit.SOCAEN = 1; //enable SOCA
EPwm1Regs.TBCTL.bit.CTRMODE = 0; //unfreeze, and enter up count mode
//
//wait while ePWM causes ADC conversions, which then cause interrupts,
//which fill the results buffer, eventually setting the bufferFull
//flag
//
while(!bufferFull);
bufferFull = 0; //clear the buffer full flag
//
//stop ePWM
//
EPwm1Regs.ETSEL.bit.SOCAEN = 0; //disable SOCA
EPwm1Regs.TBCTL.bit.CTRMODE = 3; //freeze counter
//
//at this point, AdcaResults[] contains a sequence of conversions
//from the selected channel
//
//
//software breakpoint, hit run again to get updated conversions
//
// asm(" ESTOP0");
asm("NOP");
}while(1);
}
//
// ConfigureADC - Write ADC configurations and power up the ADC for both
// ADC A and ADC B
//
void ConfigureADC(void)
{
EALLOW;
//
//write configurations
//
AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
//
//Set pulse positions to late
//
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
//
//power up the ADC
//
AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
//
//delay for 1ms to allow ADC time to power up
//
DELAY_US(1000);
EDIS;
}
//
// ConfigureEPWM - Configure EPWM SOC and compare values
//
void ConfigureEPWM(void)
{
EALLOW;
// Assumes ePWM clock is already enabled
EPwm1Regs.ETSEL.bit.SOCAEN = 0; // Disable SOC on A group
EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC on up-count
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EPwm1Regs.CMPA.bit.CMPA = 0x0100; // Set compare A value to 2048 counts
EPwm1Regs.TBPRD = 0x0200; // Set period to 4096 counts
EPwm1Regs.TBCTL.bit.CTRMODE = 3; // freeze counter
EDIS;
}
//
// SetupADCEpwm - Setup ADC EPWM acquisition window
//
void SetupADCEpwm(Uint16 channel)
{
Uint16 acqps;
//
// Determine minimum acquisition window (in SYSCLKS) based on resolution
//
if(ADC_RESOLUTION_12BIT == AdcaRegs.ADCCTL2.bit.RESOLUTION)
{
acqps = 14; //75ns
}
else //resolution is 16-bit
{
acqps = 63; //320ns
}
//
//Select the channels to convert and end of conversion flag
//
EALLOW;
AdcaRegs.ADCSOC0CTL.bit.CHSEL = channel; //SOC0 will convert pin A0
AdcaRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C
AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 0; //end of SOC0 will set INT1 flag
AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1; //enable INT1 flag
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared
EDIS;
}
//
// adca1_isr - Read ADC Buffer in ISR
//
interrupt void adca1_isr(void)
{
Uint32 sin;
GpioDataRegs.GPATOGGLE.bit.GPIO16 = 1;
AdcBuf[resultsIndex] = (AdcaResultRegs.ADCRESULT0<<4);
spll1.AC_input= (long)(AdcaResultRegs.ADCRESULT0);
SPLL_1ph_run(&spll1);
AdcaResults[resultsIndex++] = spll1.theta[0];
if(RESULTS_BUFFER_SIZE <= resultsIndex)
{
resultsIndex = 0;
bufferFull = 1;
}
// DacbRegs.DACVALS.all =AdcaResults;
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
//
// Check if overflow has occurred
//
if(1 == AdcaRegs.ADCINTOVF.bit.ADCINT1)
{
AdcaRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
}
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}
//
// End of file
//
