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Original question:

CCS/TMS320F28335: ADC Application note examples

CCS/TMS320F28335: set register values in Adc_Soc example

Sooraj S
Prodigy 100 points

Part Number: TMS320F28335
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Hello everyone,
Am a beginner in f28335 programming. In the controlsuit example for ADC how can i change the ADC clock prescaler reg value, sample and hold interval and adc core clock divider. i want to change these values to get a specific sampling rate  

Example_2833xAdcSoc

  • 0
    TI__Mastermind 21600 points

    Sooraj,

    I would start by referencing the examples in C2000Ware. That software is the latest and most up-to-date package.

    I would then take a look at this ADC reference guide that you will find helpful.

    Keep an eye out for the registers involved in the various actions you are looking to configure.

    Regards,

    Ozino

  • 0 in reply to Ozino Odharo
    TI__Mastermind 21600 points

    Sooraj,

    Are you still having issues?

    Regards,

    Ozino

  • 0 in reply to Ozino Odharo
    Prodigy 100 points

    Dear Ozino,

    No Sir , the issue not resolved yet. Am trying to set a sampling rate of 10Mhz . but whatever i do i cannot set the sampling rate to 10Mhz

  • 0 in reply to Sooraj S
    TI__Guru 60865 points

    Hi Sooraj,

    What trigger are you using to sample the ADC?  How is the ADC sequencer configured?  What are the values of the ADC and system clocks?  What is your strategy to process samples coming in that fast? (e.g. DMA)

    Can you elaborate on how setting the sampling rate fails?  Do the configurations not get written?  Does the ADC not get triggered?  Does the ADC not appear to operate at the expected speed?  Are the samples corrupt?  Do you have an issue collecting the samples?

    Does your general ADC scheme work OK at slower speed?  If so, at what speed does your code fail?   

  • 0 in reply to Sooraj S
    TI__Guru 62975 points

    Sooraj,

    Try the "adc_seq_ovd_test" example in C2000Ware.  It is written for 8.3MSPS operation and you should be able to follow the comments in the example to customize your solution.  Note that the achievable sampling rates are limited to the granularity of the clock divider options.

    -Tommy