TMS320F28335: C2000™ microcontrollers forum

Hi Roberto -

If I were faced with the same issue, I would try to post-process the ADC results through an FFT to see if I could ascertain what spectral components are present in your signal; it kind of looks like there's some periodicity to it.  If you have spurs at certain frequencies, that would point to a deterministic cause (e.g. coupling from a nearby trace or bus) rather than something random.  Are your ADC inputs in close proximity to any switching supplies, or does your sampled circuit share a common return path with one?  How about nearby clocks?  Have you sampled around your board with a sensitive EMI sniffer probe?

I would also explore using an external, good-quality voltage reference, unless you're specifically going for ratiometric sampling (where the sensor is also powered by the voltage you're using as a reference, nulling out the effect of any noise common to both).

Good luck to you!

Josh

Dear Josh. thanks for quickly reply.
I did an FFT af an acquired sample buffer to find if there is any spurious dominant frequency but i didn't find anything.
About layout take into account that i have same issue on at least 3 different board layout. I use the DSP in different products ad i tried a test  A/D acquisition firmware on all the boards i have with more or less same result.
Normally my analog input is not ratiometric with reference voltage, but in one board i used an external reference the also is used as common reference for analog section and it is quite a simple board with just insulated inputs and outputs and some communication ports. I tried also to do not initialize any other internal DSP peripherals, just the A/D one just to avoid any interference, but nothing changes.
If you have any other idea is well appreciated.
Thanks anyway
Roberto

Your confusion and consternation make a lot of sense Roberto - I would be similarly frustrated in those circumstances.  I wish I had something else to offer, but I don't have any direct experience with that part to fall back on.

One final thought: you mentioned your application requires a fast sampling speed and that you can't tolerate averaging; I think I would try to use a fast median filter with a small window size, because that filter type has the advantage of passing a step function while still removing noise.  I have no idea how much horsepower you have available for that and how it would affect your throughput; perhaps if your C2000 part has a CLA available, you could program it to independently accomplish this with little or no impact to your main thread.  I realize this solution (if indeed it is one) doesn't address whatever root cause is at play here.

I'm grasping at straws now, so I'll refrain from further speculation and hope someone from TI contacts you soon.

Josh

Roberto,

I found a socketed LQFP eZdspF28335 board here and ran the adc_seq_ovd_test example from C2000Ware using a precision reference voltage as the input to the ADC.  The example continuously stores ADC samples into a 1024 result buffer at 8.25MSPS.  My separate runs for channels A0 and B0 are below.

The bulk of the conversions are relatively well behaved with some notable excursions here and there. I did not see any signal conditioning (filtering) on the ADC channels so there is room for improvement. The performance should also improve for a soldered device vs a socketed device.

Can you try running the adc_seq_ovd_test example on your boards to see if the spread is similar? This will at least help to eliminate the possibility of a software configuration issue.

-Tommy

Dear Tommy, here below you can find the result of the adc_seq_ovd_test example running on my board at 8,33Msps. Input signal was the output of analog amplifiers chain (2 in cascade) without any input signal biased at 1,5V by external reference.

It seems to me that there is more noise than the one in your example, but take into account that i have an analog amplifier as input. I didn't do a test with external references as low noise input bias because I should have to cut some PCB tracks and manually add wiring.

I tried also to do acquisition by selecting external references, but more or less result is the same.

Anyway it seems to me that in both acquisition, mine and yours, there is more noise on B0 channel than in A0, and "sometimes" on both channel, there is some spikes the goes above the "standard" amount of noise. These spikes seems involve only just one sample reagrdless sample rate.

Probably i will add a fast median filter as kindly suggested by Josh (thanks!) to remove these spikes, because it is not clear for me the cause.

Any other suggestion will be appreciated.

Roberto

Roberto,

Can you confirm that the amplifier circuit bandwidth is high enough to fully charge the S+H capacitor within the ACQ_PS window?  For example, with a 25MHz ADC clock, you would want a bandwidth greater than 25MHz / (ACQ_PS+1).

An alternate approach would be to use a very large input capacitor (greater than 2^14 * 1.64pF = ~27nF) to realize charge sharing between the input capacitor and the S+H capacitor.  The amplifier would need to recharge the input capacitor between samples.

We have observed situations where GPIO pin toggling can increase the noise floor of the ADC.  For exampling, enabling XCLKOUT or ongoing emulation JTAG activity.

I would not expect external reference mode to make a significant difference in this case.

-Tommy

Tommy,

my amplifier is a PGA 113 from TI, I'm doing noise test check with gain=1. The last acquisition at 8,33Msps was done with ACQ_PS=1.

Here below an extract of PGA113 data sheet

The output of PGA si routed to the F28335 ADCIN thru a 47Ohm series resistor ad a 1nF parallel capacitor to ground.

Then, I have added an extra 2,2nF capacitor closed to ADCIN pin ad Analog ground of F28335, this helps to reduce noise.  

So at the input of ADC I have a RC low pass filter.

Do you think i need to increase this capacitor to 27nF? This will reduce the passband frequency of the RC low pass filter.    

Take into account that spikes are present even at lover sampling rate, like 250Ksps as in my previous post, where ACQ_PS has an higher value.

Regards

Roberto

Roberto,

Were you able to see any improvements?

-Tommy

Here attached you can find two acqusitions, made with ACQ:_PS at maximum value: 15.

The zoom scale for A0 acquisition is not the best, but it seems to me that more or less spikes are around +/- 10 to 20 bits, while for channel B0 are significantly higher.