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TMS320F280049: Watchdog Issue in TMS320F280049M

Part Number: TMS320F280049
Other Parts Discussed in Thread: C2000WARE

Hi,
I am facing an issue in watchdog module of TMS320f280049.
Watchdog is enabled on power ON & didn't reset the watchdog counter anywhere in the code.
This should reset the device as soon as the watchdog counter overflows. 
But, it doesn't happen. Unit is continuing its normal operation without any reset.
The code is shown below:-
main (void)
{
//watchdog enable on power on
WdRegs.WDCR.all=0x0002C;                                 //WDPS = 4 --> WDCLK = PREDIVCLK / 8
                                                                                 //WCHK = 0b101;
                                                                                 //WDDIS=0 --> watchdog enabled
                                                                                 //WDPRECLKDIV =0 --> PREDIVCLK = INTOSC1 / 512 &  So WDCLK =  INTOSC1/(512*8) 
                                                                                 //WDCLK = (100M)/(4096)= 24414
WdRegs.SCSR.bit.WDENINT=0;                            //Watchdog counter overflow causes reset  
}
The unit should reset as soon as watchdog counter overflows as we are not resetting watchdog counter in the code.
Please let us know more about this.
  • Hi Nitin,

    Have you checked the setting of WD register in CCS register view to make sure the configuration is as expected. Please note that WD registers are EALLOW protected so you need to use the EALLOW instruction before updating them. Please refer the WD example in C2000Ware for reference.

    Regards,

    Vivek Singh

  • Hi Vivek,
    I have taken care of EALLOW & EDIS instruction.
    I took following trial:-
    I commented watchdog disable function wherever it was called in the code.
    Forcefully Enabled watchdog by Writing "WdRegs.WDCR.all = 0". (i.e.WDDIS = 0 which enables watchdog)
    After all initialization, I checked watchdog status by adding breakpoint, still WDDIS was set to 1 i.e. watchdog is disabled 

    So watchdog is always in disable state even though I'm enabling it forcefully.

    Thanks & Regards,

    Nitin K.

  • Nitin,

    WdRegs.WDCR.all = 0 is not correct way to write this register. You need to write the WDCHK field as "101" to enable write to this register hence value you need to write is "28".

    WdRegs.WDCR.all = 0x28;

    Regards,

    Vivek Singh

  • Vivek,

    Writing "WdRegs.WDCR.all = 0x28" enables the watchdog.

    I can see WDIS bit is = 0, after writing above instruction.

    Now, I'm not resetting the watchdog counter anywhere in the code, so device should reset as soon as watchdog counter overflows.

    I'm checking in the debug mode, as soon as watchdog counter overflows compiler shows error : "No source available for 0x3FB02A"

    How can I confirm that unit is getting reset because of watchdog or it is getting stuck somewhere.

    Thanks & Regards,

    Nitin

  • Hi Nitin,

    If you are getting "No source available for 0x3FB02A" message then it means device got reset and started executing BOOTROM code for which source code is not available. You can look into RESC register status to know what has caused the reset.

    Regards,

    Vivek Singh