TMS320F280049: Layout guidelines of VDD connection for 28004x series

Wayne,

If you don't have additional questions I would like to close this post.

Regards,
PEter

Dear Peter,

Thank you for your support.

Wayne

Dear Peter,

I would like to confirm again.

In your above reply, "VDDIO should NOT be connected to VDDIO with a cap or any other means - these should be separate power rails, but could coexist on a single power plane."

Do you mean 

VDDIO should NOT be connected to "VDDIO" with a cap or any other means

or 

VDDIO should NOT be connected to "VDD" with a cap or any other means

I want to confirm if there is a typo here.

Wayne

Dear Peter,

Back to the original question,

The user connected all VDD pins via one trace.

Is that necessary?

That is, as VDD should be connected inside the chip, does the user need to connect them in physical trace again?

Or just connect VDD to the Ground by a decap?

Or it's OK for either method?

Wayne Huang

Wayne,

I am having trouble understanding your question, could you clarify?

All VDD pins should be connected to the 1.2V rail, preferably by vias to the Power Plane hosting the 1.2V rail.

Yes, it is neccessarry to connect ALL power pins to the 1.2V rail (even though some of the VDD pins may be shorted or double-bonded inside the chip)

Connecting VDD to GND with decoupling caps should be in addition to of connecting all VDD pins to 1.2V rail. Every VDD pin should be connected to 1.2V plane and connected to a decoupling cap located close to that pin.

If this is still not clear, please draw me a schematic or a picture of what you are trying to do.

Regards,

Peter

Dear Peter,

The users mean for simplicity, if they don't short VDD 1.2V physically on the same trace in the layout, but only connect the caps (bulk cap, decoupling cap) to GND. That is, they rely on the VDD connecting to each other inside the chip), is there any concern?

Wayne Huang

Wayne,

I think I know what you are saying now - in your design the decoupling cap is on the same side of the board as the MCU, so you are connecting the 1.2V pad of the cap to the VDD pin of the MCU. This should be fine as long as that trace is very short and not too thin. Otherwise put a via to VDD right next to the pin, and then another via to a decoupling capacitor near by. Is that what you are asking - if not please send me a simple drawing of what you are trying to do.

Dear Peter,

I understand.

Thank you for your support.

Wayne