I have a variable residing in CLA RAM (via #pragma DATA_SECTION) that also main C28x core is modifying. Is there any delay between C28x modifying a variable and CLA to see the change or is the change visible instantly?
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I have a variable residing in CLA RAM (via #pragma DATA_SECTION) that also main C28x core is modifying. Is there any delay between C28x modifying a variable and CLA to see the change or is the change visible instantly?
Hi,
The change will be instantly but CLA need to issue read after CPU write.
Regards,
Vivek Singh