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CCS/TMS320F28069M: Conflict of Timer Interrupt and Serial Interrupt

Tomasz Ciborowski
Prodigy 60 points

Part Number: TMS320F28069M
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Hello dear forum!

I'n new in world of Texas Instruments, and I wanted to make a program that would use two additional interrupts. I wanted to read data using SPI communication, that is triggered every 10 ms (by Timer1, executed by CPU). Meanwhile I'm sending communicates via Serial (pie->SCIRXINTB) and something strange happens. 

One SPI int takes about 1.4 ms to be done and it will be triggered while Serial int. The problem is that I want to change priorities of them, so Serial would break SPI. How can I do that?

Best Regards,

Tomasz

  • 0
    TI__Genius 17315 points

    Tomasz,

    The priority of interrupts in the PIE assignment table is fixed in the hardware architecture.  However, you could use software prioritization of interrupts.  For more information, please see C2000ware:

    C:\ti\c2000\C2000Ware_<version>\device_support\f2806x\docs\F2806x_DEV_USER_GUIDE.pdf

    On page 135 you will find the section on "Interrupt Service Routine Priorities" and on page 137 you will find an example of "Software Prioritization of Interrupts".

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken

  • 0 in reply to Ken Schachter
    Prodigy 60 points

    Here (https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/622936) someone writes that Timer1 interrupt (my SPI) is mapped outside PIE table. When you download file (which doesn't exist right now but I downloaded it before) you will see that table:

    There is Timer 1 interrupt in int13 with priority is 17. My serial interrupt is in group INT10, which has priority 14.

    So if SPI is 17 and Serial is 13, why SPI keeps interrupting Serial?

  • 0 in reply to Tomasz Ciborowski
    TI__Genius 17315 points

    Tomasz,

    Under normal operation, when an interrupt occurs the INTM is disabled to prevent nested interrupts.  The interrupt service routine (ISR) will complete before servicing another interrupt.  Make sure that you are not re-enabling the INTM in the ISR.  If you are, this will cause the ISR to be interrupted.  For more information on the interrupt operation, see page 166 in the F2806x TRM:

    http://www.ti.com/lit/spruh18

    Also, see figure 1-94 on page 168.  For the CPU level interrupts you will find a reference to the CPU and instruction set reference guide:

    http://www.ti.com/lit/spru430

    As another refence, please see the F28069 Workshop at:

    https://training.ti.com/c2000-f2806x-microcontroller-workshop

    In module 4 you will find information about interrupts.  Also, see lab 5 exercise (second part) to learn more about the operation of the interrupts.

    I hope this helps. If this answers your question, please click the green "Verified Answer" button. Thanks.

    - Ken

  • 0 in reply to Ken Schachter
    Prodigy 60 points

    Thank you kindly for your response! I think it should work for me, or I will just change interrupt type from Timer to checking SPi buffer, anyway, thank you very much.