TMS320F280049C: InstaSpin SVPWM 5 or 7 switch

Yanming Luo said:

ou may take a look at the technical manual of the device to know how to configure the ePWM registers.

It states the force mode action qualifier is used to determine the waveform being generated by HW (ePWM module) not SW. That is why I question InstaSpin labs using 7 phase 6 switch mode as ePWM module seems to be configured 5 switch mode in hal.c. One difference is switching losses are greater in 7 phase 6 switch alternatively produce harmonics and dead band imbalance via 5 switch, some TI reference name 4 switch.

Why are 3 generators B side being forced high until dead band changes state it seems? If the SPV tables use all 8 rotation angles in Clarke/Park transforms, seemingly it should Not be necessary to force B side high if SW controls the state changes. I really dislike keeping the high side active at all times, Hall code 111 is supposed to produce 000 at the inverter in 7 phase SVPWM as it has been documented...

Yanming Luo said:

The code you mentioned above is just for the initial state during the board powers on

So the action qualifier has not forced B side on in later configurations. The dead band typically inverts A side to make B out and (loose Gen B) in other TI ePWM modules, so this behavior is new to me. It stands to reason qualifier forced B is then inverted again by dead band and low side NFETS are held in the OFF state for initialing DRV8320RS. Perhaps not as dangerous as I had thought.

Thanks for clearing that up, had forgotten C2000 ePWM module distinctly separates A/B dead band channels. 

HAL_setupPWMs() configuration A side was used to make B dead band output, somehow forced B action qualifier makes only A side pulse width active?

The entire point of dead band path division was to allow selective control of the dead band A/B paths and separate FED/RED delays producing a balanced dead band with no harmonics. The distinct advantage of 7 phase SVPWM is the dead band control being balanced does not add the harmonics that HW control 5 phase SVPWM does.

That said, it appears dead band has not been configured to avoid imbalance harmonics. Seemingly B side generators are disabled by dead band setup, during duty cycle updates only pwm-A has any effect. Also trumps the complementary PWM outputs if B is lost through dead band control via A, this seemingly leads to imbalance harmonics as documented by SPRA524 March 1999.

A better way is to control both A/B dead bands directly from A/B generators at output enable time. Perhaps avoiding imbalance harmonics in the labs and later production SW by separating dead band controls. This code below taken from HAL_setupPWMs() uses A to make B dead band. Technical diagram shows two distinct dead band channels can be configured yet only A was used and B was forced high or lost.

        // setup the Dead-Band Generator Control Register (DBCTL)
        EPWM_setDeadBandDelayMode(obj->pwmHandle[cnt], EPWM_DB_RED, true);
        EPWM_setDeadBandDelayMode(obj->pwmHandle[cnt], EPWM_DB_FED, true);

        // select EPWMA as the input to the dead band generator
        EPWM_setRisingEdgeDeadBandDelayInput(obj->pwmHandle[cnt],
                                             EPWM_DB_INPUT_EPWMA);

        // configure the right polarity for active high complementary config.
        EPWM_setDeadBandDelayPolarity(obj->pwmHandle[cnt],
                                      EPWM_DB_RED,
                                      EPWM_DB_POLARITY_ACTIVE_HIGH);
        EPWM_setDeadBandDelayPolarity(obj->pwmHandle[cnt],
                                      EPWM_DB_FED,
                                      EPWM_DB_POLARITY_ACTIVE_LOW);

Please confirm if PWMB drives dead band added to HAL_setupPWMs() reduces SVPWM harmonics? Perhaps update the InsatSpin SDK labs with modified dead band method utilizing EPWM-B. Goal is to eliminate 7 phase SVPWM harmonics by adding EPWM-B direct control of dead band timing, not just use EPWM-A as it was configured. How can any customer be sure dead band errata is not being masked by InstaSpin SDK labs and later roll out into production?

What is the point of center aligned complementary EPWM-A/B generator outputs if EPWB is never used for duty cycle updates? The ePWM module once configured via HAL_setupPWMs(), dead band generators must never be (reconfigured) once the pulse width and period has been set! Likewise suggestions in forum of changing the period of EPWMA/B outputs during run time operation is a dangerous practice.  

The priority of the Forced Action Qualifier (EPWMB high) was never configured in HAL_setupPWMs() leads to investigation ? why. Yet the technical manual shows TI/T2 trip register typically configured for the SW forced event (red box). It seems there was a rush to configure the ePWM but to what end? Will said rush lead to more sales of C2000 MCU quieter running PM motors or make customers angry when it easily falls apart in the labs?

I get SW don't have to do anything with EPMB since it was dropped at the dead band generators input, thus AQ forced high. The point being was that a prudent step for long term customer goals and what side effects might result in quality control? How are the generator updates even working via global updates in shadow mode "or not" if TI/T2 actions were never configured AQTSRCSEL register, assuming symmetric waveform, e.g. 18.6.5?