• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 83 subscribers
  • Views 1175 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28379D: Speed Flash vs. RAM

Ralf Bartling
Expert 1155 points

Part Number: TMS320F28379D

Hello,
I have a question regarding the speed of the DSP.

I'm working on the one day workshop with the launchpad of the TMS320F28379D. In the second example (LAB2) a simple delay loop is used.

       .def _F28x_usDelay
;       .sect "ramfuncs"
       .sect ".text"

        .global  __F28x_usDelay
_F28x_usDelay:
        SUB    ACC,#1
        BF     _F28x_usDelay,GEQ    ;; Loop if ACC >= 0
        LRETR

When the program is executed from the RAM, the delay will be approximately 500ms, this is the expected value.

For execution from the FLASH I have changed the .sect line to ".text" in order to move the program to the FLASH. The linker command file was also changed from RAM to FLASH (2837xD_RAM_lnk_cpu1.cmd --> 2837x_FLASH_lnk_cpu1.cmd)

After this the delay time rises to 5600ms, so it seemes to be that the DSP is more than 11 times slower, when execution from the FLASH is done.

Is this a plausible value?

I have a second question regarding the RAM areas of the DSP. We have M0/M1, LSx RAM, D0/D1 and GSx RAM areas.

What are the differences between these areas? Do they have different access times or functions?

Best regards
Ralf

  • 0
    TI__Genius 15385 points

    Hi Ralf,

    I suggest you please go through the Technical Reference Manual and read through Flash and RAM, that will give you better understanding on each memories.

    Here are the answers to your questions:

    1. When you read/execute code from Flash at device speed it requires Wait States, as the Flash access is not instantaneous when you run at higher speed. If you read through the data sheet it explains what is the Wait State requirements at different device frequency. In your case it appears that Flash Wait State is configured to 10. All the RAM accesses are single cycle, hence their is no delay.

    2. For all the RAMs, access times are the same. They are classified differently based on the requirement, for eg. LS - Means Locally Shared (tightly coupled to that CPU subsystem), GS - Means Globally shared (any cpu subsystem can use it). Please go through the TRM for detailed explanation and hookups.

    Regards,

    Nirav